TetraFET
DMD1012
DMD1012-A
ROHS COMPLIANT
METAL GATE RF SILICON FET
MECHANICAL DATA
B
G
(typ)
C
(2 pls)
2
1
H
D
3
P
(2 pls) A
5
4
E
(4 pls)
F
I
GOLD METALLISED
MULTI-PURPOSE SILICON
DMOS RF FET
100W – 28V – 500MHz
PUSH–PULL
FEATURES
N
M
O
J
K
• SUITABLE FOR BROAD BAND APPLICATIONS
• SIMPLE BIAS CIRCUITS
D1
PIN 1
PIN 3
PIN 5
SOURCE (COMMON)
DRAIN 2
GATE 1
DIM
A
B
C
D
E
F
G
H
I
J
K
M
N
O
P
Millimetres
15.24
10.80
45°
9.78
8.38
27.94
1.52R
10.16
21.84
0.10
1.96
1.02
4.45
34.04
1.63R
Tol.
0.50
0.13
5°
0.13
0.13
0.13
0.13
0.15
0.23
0.02
0.13
0.13
0.38
0.13
0.13
PIN 2
PIN 4
DRAIN 1
GATE 2
• ULTRA-LOW THERMAL RESISTANCE
• BeO FREE
Inches
0.600
0.425
45°
0.385
0.330
1.100
0.060R
0.400
0.860
0.004
0.077
0.040
0.175
1.340
0.064R
Tol.
0.020
0.005
5°
0.005
0.005
0.005
0.005
0.006
0.009
0.001
0.005
0.005
0.015
0.005
0.005
• LOW Crss
• HIGH GAIN – 13 dB MINIMUM
APPLICATIONS
•
VHF/UHF COMMUNICATIONS
from 1 MHz to 500 MHz
ABSOLUTE MAXIMUM RATINGS
(T
case
= 25°C unless otherwise stated)
P
D
BV
DSS
BV
GSS
I
D(sat)
T
stg
T
j
* Per Side
Semelab Plc reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by Semelab is believed
to be both accurate and reliable at the time of going to press. However Semelab assumes no responsibility for any errors or omissions discovered in its use.
Semelab encourages customers to verify that datasheets are current before placing orders.
Power Dissipation
Drain – Source Breakdown Voltage *
Gate – Source Breakdown Voltage*
Drain Current*
Storage Temperature
Maximum Operating Junction Temperature
500W (290W -A Version)
70V
±20V
15A
–65 to 150°C
200°C
Semelab plc.
Telephone +44(0)1455 556565. Fax +44(0)1455 552612.
Website:
http://www.semelab.co.uk
E-mail:
sales@semelab.co.uk
Document Number 7346
Issue 1
DMD1012
DMD1012-A
ELECTRICAL CHARACTERISTICS
(T
case
= 25°C unless otherwise stated)
Parameter
Test Conditions
Min.
PER SIDE
BV
DSS
I
DSS
I
GSS
V
GS(th)
g
fs
Drain–Source Breakdown
Voltage
Zero Gate Voltage
Drain Current
Gate Leakage Current
Gate Threshold Voltage*
Forward Transconductance*
Gate Threshold Voltage
Matching Between Sides
V
GS
= 0
V
DS
= 28V
V
GS
= 20V
I
D
= 10mA
V
DS
= 10V
I
D
= 10mA
I
D
= 100mA
V
GS
= 0
V
DS
= 0
V
DS
= V
GS
I
D
= 3A
V
DS
= V
GS
1
2.4
70
Typ.
Max. Unit
V
3
1
7
mA
μA
V
mhos
0.1
V
V
GS(th)match
TOTAL DEVICE
G
PS
η
VSWR
C
iss
C
oss
C
rss
Common Source Power Gain
Drain Efficiency
Load Mismatch Tolerance
Input Capacitance
Output Capacitance
P
O
= 100W
V
DS
= 28V
f = 500MHz
I
DQ
= 1.2A
13
50
20:1
V
GS
= –5V f = 1MHz
V
GS
= 0
V
GS
= 0
f = 1MHz
f = 1MHz
180
90
7.5
dB
%
—
pF
pF
pF
PER SIDE
V
DS
= 28V
V
DS
= 28V
Reverse Transfer Capacitance V
DS
= 28V
* Pulse Test:
Pulse Duration = 300
μs
, Duty Cycle
≤
2%
THERMAL DATA
R
THj–case
Thermal Resistance Junction – Case
Max. 0.35°C / W
0.6 °C / W -A Version
Semelab Plc reserves the right to change test conditions, parameter limits and package dimensions without notice. Information furnished by Semelab is believed
to be both accurate and reliable at the time of going to press. However Semelab assumes no responsibility for any errors or omissions discovered in its use.
Semelab encourages customers to verify that datasheets are current before placing orders.
Semelab plc.
Telephone +44(0)1455 556565. Fax +44(0)1455 552612.
Website:
http://www.semelab.co.uk
E-mail:
sales@semelab.co.uk
Document Number 7346
Issue 1
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