OneNAND2G(KFG2G16Q2M-DEBx)
OneNAND4G(KFH4G16Q2M-DEBx)
OneNAND8G(KFW8G16Q2M-DEBx)
FLASH MEMORY
KFG2G16Q2M
KFH4G16Q2M
KFW8G16Q2M
2Gb OneNAND M-die
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
OneNAND™‚
is a trademark of Samsung Electronics Company, Ltd. Other names and brands may be claimed as
the property of their rightful owners.
* Samsung Electronics reserves the right to change products or specification without notice.
1
OneNAND2G(KFG2G16Q2M-DEBx)
OneNAND4G(KFH4G16Q2M-DEBx)
OneNAND8G(KFW8G16Q2M-DEBx)
FLASH MEMORY
Revision History
Document Title
OneNAND
Revision History
Revision No. History
0.0
0.1
1. Initial issue.
Draft Date
Mar. 30, 2006
Remark
Advanced
Preliminary
1. Corrected errata.
Aug. 3, 2006
2. Changed a tem from MAT to Plane.
3. Chapter 1.4 & 2.3 & 8.0 : Revised the package size from 11x13 to 10x13.
4. Chapter 2.4 : Revised AVD pin description.
5. Chapter 2.8.3 : Eliminated ’Top boot’ option.
6. Chapter 2.8.12 & 2.8.16 & 3.8 : Added a. comment about FSA & FCSA
setting on Cache Read Operation
7. Chapter 2.8.18 : Added acceptible command during busy on Unlock,
Lock, Lock-tight, All block unlock and Erase suspend operation.
8. Chapter 3.1 : Eliminated ’read data from buffer’ and ’write data to buffer’
contents.
9. Chapter 3.3.1& 4.2 & 6.18 : Revised the bootcopy condtions.
10. Chapter 3.3 : Revised default value on Start Block Address with hot
reset.
11. Chapter 3.5 : Revised POR level into 1.5V and resetting guidance.
12. Chapter 3.11.1~3 : Added details and restrictions about 2X program and
2X Cache Program.
13. Chapter 3.11.3 & 6.16 : Revised mandatory codition which is ’INT auto
mode for 2X interleave Cache Program’ into manually writable INT cond-
tion as 2X Program or 2X Cache Program.
14. Chapter 3.13.2 : Eliminated the expression ’suspended’ on Case 2.
15. Chapter 3.14.1 : Revised Note 1 on OTP load flow chart.
16. Chapter 4.3 : Revised Load/Program/Erase current value and added
"2X Program current" item.
17. Chapter 5.4 : Revised tBDH(into 2ns on 83Mhz) and tAVDH(into 2ns on
66/83Mhz).
18. Chapter 5.8 : Revised tAVDH(into 2ns on 66/83Mhz)
19. Chapter 5.10 : Revised tWB table.
20. Chapter 5.11 : Revised tINTL table and its value.
21. Chapter 6.11 : Added "Start Initial Burst Write Operation" timing.
22. Chapter 6.22 : Revised timing diagram.
1. Corrected errata.
Sep. 20, 2006
2. Chapter 3.1 : Added restrictions of command based operation on DDP.
3. Chapter 3.5 & 6.22 : Corrected data protection explanation during power-
down.
4. Chapter 7.1 & 7.1.2 : Added the case table of INT type and comment
regarding INT pin connection when unused.
5. Chapter 7.1.3 : Corrected INT behavior graphs.
1. Corrected errata
Dec. 21, 2006
2. Chapter 2.8.19 : revised RDY config.
3. Chapter 3.3 : revised Reset Mode Operation
4. Chapter 3.4.4 & 3.11 & 3.12 & 3.13.1 & 3.13.3 : revised flow charts of
’Data protection operation’ & ’All block unlock operation’ & ’Program oper-
ation’ & ’Copy-back program operation’ & ’Block erase operation’ & ’Multi-
Block Erase Verify Read’
5. Chapter 3.6 & 3.8 & 3.9.5 : deleted ECC error check step on load opera
tion
1.0
Final
1.1
Final
2
OneNAND2G(KFG2G16Q2M-DEBx)
OneNAND4G(KFH4G16Q2M-DEBx)
OneNAND8G(KFW8G16Q2M-DEBx)
FLASH MEMORY
Revision History
Document Title
OneNAND
Revision History
Revision No. History
1.1
6. Chapter 3.9 : corrected start address restriction of DataRAMs
7. Chapter 3.9.1 : deleted data sequence table
8. Chapter 5.9 : added notes and tINTW parameter
9. Chapter 6.13 & 6.17 : revised timing diagram
Draft Date
Dec. 21, 2006
Remark
Final
1.2
1. Corrected errata.
2. Chapter 2.8.23 Start Block Address Register F24Ch revised.
3. Chapter 2.8.26 ECC Status Register FF00h revised.
4. Chapter 3.3 Reset Mode Operation revised.
5. Chapter 3.3.1 Cold Reset Mode Operation revised.
6. Chapter 3.8 Cache Read flow chart revised.
7. Chapter 5.4 AC Characteristics for Synchronous Burst Read revised.
8. Chapter 5.9 AC Characteristics for Load/Program/Erase Performance
revised.
9. Chapter 6.18 Cold Reset Timing revised.
Aug. 27, 2007
Final
1.3
1. Chapter 5.9 AC Characteristics for Load/Program/Erase Performance
revised.
Sep. 06, 2007
Final
3
OneNAND2G(KFG2G16Q2M-DEBx)
OneNAND4G(KFH4G16Q2M-DEBx)
OneNAND8G(KFW8G16Q2M-DEBx)
FLASH MEMORY
1.0
INTRODUCTION
This specification contains information about the Samsung Electronics Company OneNAND
™
‚ Flash memory product family. Section
1.0 includes a general overview, revision history, and product ordering information.
Section 2.0 describes the OneNAND device. Section 3.0 provides information about device operation. Electrical specifications and
timing waveforms are in Sections 4.0 through 6.0. Section 7.0 provides additional application and technical notes pertaining to use of
the OneNAND. Package dimensions are found in Section 8.0
Density
2Gb
4Gb
8Gb
Part No.
KFG2G16Q2M-DEBx
KFH4G16Q2M-DEBx
KFW8G16Q2M-DEBx
V
CC
(core & IO)
1.8V(1.7V~1.95V)
1.8V(1.7V~1.95V)
1.8V(1.7V~1.95V)
Temperature
Extended
Extended
Extended
PKG
63FBGA(LF)
63FBGA(LF)
63FBGA(LF)
1.1
Flash Product Type Selector
Samsung offers a variety of Flash solutions including NAND Flash, OneNAND
™
and NOR Flash. Samsung offers Flash products
both component and a variety of card formats including RS-MMC, MMC, CompactFlash, and SmartMedia.
To determine which Samsung Flash product solution is best for your application, refer the product selector chart.
Application Requires
Fast Random Read
Fast Sequential Read
Fast Write/Program
Multi Block Erase
Erase Suspend/Resume
Copyback
Lock/Unlock/Lock-Tight
ECC
Scalability
Samsung Flash Products
NAND
•
•
OneNAND
™
•
•
•
(Max 64 Blocks)
•
•
(EDC)
External (Hardware/Software)
•
•
(ECC)
•
Internal
•
•
X
•
•
NOR
•
4
OneNAND2G(KFG2G16Q2M-DEBx)
OneNAND4G(KFH4G16Q2M-DEBx)
OneNAND8G(KFW8G16Q2M-DEBx)
FLASH MEMORY
x
Speed
6 : 66MHz
8 : 83MHz
Product Line desinator
B : Include Bad Block
D : Daisy Sample
Operating Temperature Range
E = Extended Temp. (-30
°C
to 85
°C)
Package
D : FBGA(Lead Free)
Version
1st Generation
Page Architecture
2 : 2KB Page
1.2
Ordering Information
KF x x 16 Q 2 M - D E x
Samsung
OneNAND Memory
Device Type
G : Single Chip
H : Dual Chip
W: Quad Chip
Density
2G : 2Gb
4G : 4Gb
8G : 8Gb
Organization
x16 Organization
Operating Voltage Range
Q : 1.8V(1.7 V to 1.95V)
1.3
Architectural Benefits
OneNAND is a highly integrated non-volatile memory solution based around a NAND Flash memory array.
The chip integrates system features including:
•
A BootRAM and bootloader
•
Two independent bi-directional 2KB DataRAM buffers
•
A High-Speed x16 Host Interface
•
On-chip Error Correction
•
On-chip NOR interface controller
This on-chip integration enables system designers to reduce external system logic and use high-density NAND Flash in applications
that would otherwise have to use more NOR components.
OneNAND takes advantage of the higher performance NAND program time, low power, and high density and combines it with the
synchronous read performance of NOR. The NOR Flash host interface makes OneNAND an ideal solution for applications like G3
Smart Phones, Camera Phones, and mobile applications that have large, advanced multimedia applications and operating systems,
but lack a NAND controller.
When integrated into a Samsung Multi-Chip-Package with Samsung Mobile DDR SDRAM, designers can complete a high-perfor-
mance, small footprint solution.
5
京公网安备 11010802033920号
EEWORLD
