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CAT24WC129L-3REVA

Description
EEPROM, 16KX8, Serial, CMOS, PDIP8, GREEN, PLASTIC, DIP-8
Categorystorage    storage   
File Size585KB,9 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT24WC129L-3REVA Overview

EEPROM, 16KX8, Serial, CMOS, PDIP8, GREEN, PLASTIC, DIP-8

CAT24WC129L-3REVA Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeDIP
package instructionDIP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)1 MHz
JESD-30 codeR-PDIP-T8
JESD-609 codee3
length9.59 mm
memory density131072 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count16384 words
character code16000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize16KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height4.57 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMATTE TIN
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width7.62 mm
Maximum write cycle time (tWC)10 ms
CAT24WC129
128K-Bit I
2
C Serial CMOS EEPROM
FEATURES
I
1MHz I
2
C Bus Compatible*
I
1.8 to 6 Volt Operation
I
Low Power CMOS Technology
I
64-Byte Page Write Buffer
I
Self-Timed Write Cycle with Auto-Clear
I
Commercial, Industrial and Automotive
I
Write Protect Feature
I
100,000 Program/Erase Cycles
I
100 Year Data Retention
I
8-Pin DIP or 8-Pin SOIC
H
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
– Top 1/4 Array Protected When WP at V
IH
I
"Green" Package Options Available
Temperature Ranges
DESCRIPTION
The CAT24WC129 is a 128K-bit Serial CMOS E
2
PROM
internally organized as 16384 words of 8 bits each.
Catalyst’s advanced CMOS technology substantially
PIN CONFIGURATION
DIP Package (P, L)
NC
NC
NC
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
SOIC Package (J, W, K, X)
PIN FUNCTIONS
Pin Name
SDA
SCL
WP
V
CC
V
SS
i
D
NC
NC
VSS
NC
1
2
3
4
c
s
8
7
6
5
VCC
WP
SCL
SDA
i
t
n
o
u
n
VCC
VSS
SDA
WP
reduces device power requirements. The
CAT24WC129 features a 64-byte page write buffer.
The device operates via the I
2
C bus serial interface and
is available in 8-pin DIP or 8-pin SOIC packages.
BLOCK DIAGRAM
EXTERNAL LOAD
d
e
DOUT
ACK
CONTROL
LOGIC
a
P
t
r
SENSE AMPS
SHIFT REGISTERS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
512
START/STOP
LOGIC
XDEC
256
EEPROM
256X512
Function
DATA IN STORAGE
Serial Data/Address
Serial Clock
Write Protect
+1.8V to +6V Power Supply
Ground
SCL
STATE COUNTERS
HIGH VOLTAGE/
TIMING CONTROL
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
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