SCD55100
YELLOW
SCD55101
HIGH EFFICIENCY RED
SCD55102
GREEN
SCD55103
HIGH EFFICIENCY GREEN
SCD55104
STANDARD RED
Slimline
0.145" 10-Character 5x5 Dot Matrix Serial Input
Dot Addressable Intelligent Display
®
Devices
Dimensions in inches (mm)
1.500 max. (38.10)
0.150
0.080
(3.81)
(2.03)
.050
(1.27)
typ.
.394
±.006
(10.0
±.15)
Pin 1
Indicator
1.350
(34.29)
SCD 5510X
SIEMENS YYWW
0.160
±.02
(4.06
±.51)
0.200
(5.08)
0.145
(3.68)
.012 (.30)
typ.
.300
±.020
1
(7.62
±.51)
EIA date code
Intensity Code
Hue Category
Y
Z
Seating Plane
.018 (.46) typ.
FEATURES
• Low Profile Package: 60% Smaller than Industry
Standard 10-Digit Display
• Ten 0.145" (3.68 mm) 5x5 Dot Matrix Characters
in Red, Yellow, High Efficiency Red, Green, or
High Efficiency Green
• Optimum Display Surface Efficiency
(display area to package ratio)
• Low Power–30% Less Power Dissipation
than 5x7 Format
• High Speed Data Input Rate: 5 MHz
• ROMless Serial Input, Dot Addressable
Display—Ideal for User Defined Characters
• Built-in Decoders, Multiplexers and LED
Drivers
• Readable from 6 Feet (1.8 meters)
• Wide Viewing Angle, X Axis
±
55
°
, Y Axis
±
65
°
• Attributes:
– 250 bit RAM for User Defined Characters
– Eight Dimming Levels
– Power Down Mode (<250
µ
W)
– Hardware/Software Clear Function
– Lamp Test
• Internal or External Clock
• End-Stackable Dual-in-line Plastic Package
• 3.3 V Capability
.100±.010 typ.(2.54±.25)
Tol. non-cum. 1
1.300 ref.
(33.02)
1.
2.
3.
4.
Dimension is at Seating Plane.
Display matrix and pins centered on package outline.
Display matrix centered to pin array.
Tolerance: .XXX =
±
.010 (.25)
DESCRIPTION
The SCD55100 (Red), SCD55101 (Yellow), SCD55102 (HER),
SCD55103 (Green) and SCD55104 (HEG) are eight digit dot address-
able 5x5 matrix, Serial Input, Intelligent Display devices.
The ten 0.145" (3.68 mm) high digits are packaged in a rugged, high
quality optically transparent, standard 0.3" pin spacing 28 pin plastic DIP.
The on-board CMOS has a 250 bit RAM, one bit associated with one
LED, each to generate User Defined Characters. Due to the reduced
LED count, power requirement and heat dissipation are reduced by
30%. Additionally in Power Down Mode quiescent current is <50
µ
A.
The SCD5510X is designed to work with the Serial port of most com-
mon microprocessors. The multiplex Clock I/O (CLK I/O) and multiplex
Clock Select (CLK SEL) pins offer the user the capability to supply a
high speed external multiplex clock. This feature can minimize audio
in-band interference for portable communication equipment or elimi-
nate the visual synchronization effects found in high vibration environ-
ments such as avionics equipment.
2–125
Maximum Ratings
DC Supply Voltage ............................................ –0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground ............................................... –0.5 to V
CC
+0.5 Vdc
Operating Temperature .................................... –40
°
C to +85
°
C
Storage Temperature....................................... –40
°
C to +100
°
C
Maximum Solder Temperature
0.063" below Seating Plane, t<5 sec ............................ 260
°
C
Relative Humidity at 85
°
C ...................................................85%
Maximum Number of LEDs on
at 100% Brightness .......................................................... 160
Maximum Power Dissipation ......................................1.7 Watts
IC Junction Temperature .................................................. 125
°
C
ESD (100 pF, 1.5 K
Ω
) ........................................................... 2 KV
Maximum Input Current .............................................
±
100 mA.
Figure 1. Data write cycle
Figure 4. Top view
28
15
1
14
3.5 V
LOAD
T
LDS
DATA
T
DS
T
DH
SDCLK
T
SDCW
T
SDCW
3.5 V
1.5 V
T
LDH
3.5 V
1.5 V
1.5 V
T
SDCLK
Period
Figure 2. Instruction cycle
T
WR
T
BL
LOAD
SDCLK
DATA
LOAD
SDCLK
DATA
D0
D1
D2
D3
D4
D5
D6
D7
D0
D0
D1
D2
D3
OR
D4
D5
D6
D7
D0
Figure 3. Maximum power dissipation vs. temperature
P
D –
Maximum Power Dissipation – Watts
3.0
2.5
2.0
1.5
1.0
0.5
0.0
–40 –30 –20 –10
θ
JA=31°C/W
0
10
20
30
40
50
60
70
80
90 100 120 130 140
T
A
–
°C
Ambient Temperature
SCD55100/1/2/3/4
2–126
Electrical characteristics
(over operating temperature)
Parameter
V
CC
I
CC
(Pwr Dwn Mode)
(4)
I
CC
10 digits
16 dots/character
I
IL
Input current
I
IH
Input current
V
IH
V
IL
I
OH
(CLK I/O)
I
OL
(CLK I/O)
θ
JA
F
ext
External Clock Input
Frequency
F
osc
Internal Clock Input
Frequency
Clock I/O Bus Loading
Clock Out Rise Time
Clock Out Fall Time
FM, Digit
375
768
120
120
–8.9
1.6
31
347
347
240
500
500
1086
3.5
1.5
Min.
4.5
Typ.
5.0
50
250
365
–10
10
Max.
5.5
Units
V
µ
A
mA
µ
A
µ
A
V
V
mA
mA
°
C/W
KHz
KHz
pF
ns
ns
Hz
V
CC
=4.5 V, V
OH
=2.4 V
V
CC
=4.5 V, V
OH
=0.4 V
V
CC
=5.0 V, CLKSEL=0
V
CC
=5.0 V, CLKSEL=1
V
CC
=5 V, all inputs=0 V or V
CC
V
CC
=5 V, “#” displayed in all 10 digits
at 100% brightness at 25
°
C
V
CC
=5 V, V
IN
=0 V (all inputs)
V
CC
=V
IN
=5.0 V (all inputs)
V
CC
=4.5 V to 5.5 V
V
CC
=4.5 V to 5.5 V
V
CC
=4.5 V, V
OH
=2.4 V
V
CC
=4.5 V, V
OL
=0.4 V
Conditions
Notes:
1)
Peak current
5
/
3
x I
CC.
2)
Unused inputs must be tied high.
3)
Contact Siemens for 3.3 volt operation.
4)
External oscillator must be stopped if being used to maintain an I <50
µ
A.
CC
Input/Output Circuits
Figures 5 and 6 show the input and output resistor/diode
networks used for ESD protection and to eliminate substrate
latch-up caused by input voltage over/under shoot.
Figure 5. Inputs
V
CC
input
1 KΩ
input/output
Figure 6. Clock I/O
V
CC
1 KΩ
GND
GND
SCD55100/1/2/3/4
2–127
Optical Characteristics at 25
°
C
(V
CC
=5.0 V at 100% brightness level, viewing angle: X axis
±
55
°
, Y axis
±
65
°
)
Red SCD55100
Description
Luminous Intensity
Peak Wavelength
Dominant Wavelength
Yellow SCD55101
Description
Luminous Intensity
Peak Wavelength
Dominant Wavelength
High Efficiency Red SCD55102
Description
Luminous Intensity
Peak Wavelength
Dominant Wavelength
Green SCD55103
Description
Luminous Intensity
Peak Wavelength
Dominant Wavelength
High Efficiency Green SCD55104
Description
Luminous Intensity
Peak Wavelength
Dominant Wavelength
Symbol
I
V
λ
(peak)
λ
(d)
Symbol
I
V
λ
(peak)
λ
(d)
Min.
36
Typ.
78
665
639
Units
µ
cd/dot
nm
nm
Symbol
I
V
λ
(peak)
λ
(d)
Min.
124
Typ.
208
583
584
Units
µ
cd/dot
nm
nm
Symbol
I
V
λ
(peak)
λ
(d)
Min.
124
Typ.
237
630
626
Units
µ
cd/dot
nm
nm
Symbol
I
V
λ
(peak)
λ
(d)
Min.
124
Typ.
238
565
569
Units
µcd/dot
nm
nm
Min.
124
Typ.
500
568
572
Units
µcd/dot
nm
nm
Notes:
1. Dot to dot intensity matching at 100% brightness is 1.8:1.
2. Displays are binned for hue at 2 nm intervals.
3. Displays within a given intensity category have an intensity matching of 1.5:1 (max.).
SCD55100/1/2/3/4
2–128
Pin assignment
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Function
SDCLK
LOAD
NC
NC
NC
V
CC
NP
NP
V
CC
NC
NC
NC
RST
GND
Pin
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Function
GND
DATA
NC
NC
NC
V
CC
NP
NP
V
CC
V
CC
NC
NC
CLKSEL
CLK I/O
Pin definitions
Pin
1
Function
SDCLK
Definitions
Loads data into the 8-bit serial
data register on a low to high tran-
sition.
Low input enables data clocking
into 8-bit serial shift register.
When LOAD goes high, the con-
tents of 8-bit serial Shift Register
will be decoded.
No connection
No connection
No connection
Power supply/heat sink
No pin
No pin
Power supply/heat sink
No connection
No connection
No connection
Asynchronous input, when low
will clear the Multiplex Counter,
User RAM and Data Register.
Control Word Register is set to
100% brightness and the Address
Register is set to select Digit 0.
The display is blanked.
Power supply ground
Outputs master clock or inputs
external clock.
H=internal clock, L=external clock
No connection
No connection
Power supply/heat sink
Power supply/heat sink
No pin
No pin
Power supply/heat sink
No connection
No connection
No connection
Serial data input
Power supply ground
2
LOAD
3
4
5
6
7
8
9
10
11
NC
NC
NC
V
CC
NP
NP
V
CC
NC
NC
NC
RST
Switching specifications
(over operating temperature range and V
CC
=4.5 V to 5.5 V)
Symbol
T
RC
T
LDS
T
DS
T
SDCLK
T
SDCW
T
LDH
T
DH
T
WR
T
BL
Description
Reset Active Time
Load Setup Time
Data Setup Time
Clock Period
Clock Width
Load Hold Time
Data Hold Time
Total Write Time
Time Between Loads
Min.
600
50
50
200
70
0
25
2.2
600
Units
ns
ns
ns
ns
ns
ns
ns
µs
ns
12
13
14
15
16
17
18
19
20
21
22
23
GND
CLK I/O
CLKSEL
NC
NC
V
CC
V
CC
NP
NP
V
CC
NC
NC
NC
DATA
GND
Note:
T
SDCW
is the minimum time the SDCLK may be low or high.
The SDCLK period must be a minimum of 200 ns.
Figure 7. Dot matrix format
0.033
(0.84)
typ.
0.080
(2.03)
C0 C1 C2 C3 C4
R0
R1
R2
R3
0.011
(0.28)
typ.
R4
0.022
(0.56) typ.
0.145
(3.68)
24
25
26
27
Dimensions in inches (mm)
Dimensions in inches (mm)
Tolerance: .XXX=± .010 (.25)
28
TOLERANCE
: .XXX=±.010 (.25)
SCD55100/1/2/3/4
2–129
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