2SD1470AT datasheet, PDF - EEWORLD Datasheet

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2SD1470AT: DescriptionSmall Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3; CategoryDiscrete semiconductor The transistor; File Size120KB，4 Pages; ManufacturerHitachi （Renesas ）; Websitehttp://www.renesas.com/eng/

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2SD1470AT Overview

Small Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3

2SD1470AT Parametric

Parameter Name	Attribute value
package instruction	SMALL OUTLINE, R-PSSO-F3
Contacts	3
Reach Compliance Code	unknow
ECCN code	EAR99
Shell connection	COLLECTOR
Maximum collector current (IC)	1 A
Collector-emitter maximum voltage	60 V
Configuration	DARLINGTON
Minimum DC current gain (hFE)	2000
JESD-30 code	R-PSSO-F3
Number of components	1
Number of terminals	3
Package body material	PLASTIC/EPOXY
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Polarity/channel type	NPN
Certification status	Not Qualified
surface mount	YES
Terminal form	FLAT
Terminal location	SINGLE
transistor applications	AMPLIFIER
Transistor component materials	SILICON
Base Number Matches	1

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2SD1470AT Related Products

	2SD1470AT	2SD1470ATTR	2SD1470ATTL	2SD1470ATUL	2SD1470ATUR
Description	Small Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3	Small Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3	Small Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3	Small Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3	Small Signal Bipolar Transistor, 1A I(C), 60V V(BR)CEO, 1-Element, NPN, Silicon, UPAK-3
package instruction	SMALL OUTLINE, R-PSSO-F3	SMALL OUTLINE, R-PSSO-F3	SMALL OUTLINE, R-PSSO-F3	SMALL OUTLINE, R-PSSO-F3	SMALL OUTLINE, R-PSSO-F3
Contacts	3	3	3	3	3
Reach Compliance Code	unknow	unknow	unknow	unknow	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
Shell connection	COLLECTOR	COLLECTOR	COLLECTOR	COLLECTOR	COLLECTOR
Maximum collector current (IC)	1 A	1 A	1 A	1 A	1 A
Collector-emitter maximum voltage	60 V	60 V	60 V	60 V	60 V
Configuration	DARLINGTON	DARLINGTON	DARLINGTON	DARLINGTON	DARLINGTON
Minimum DC current gain (hFE)	2000	2000	2000	2000	2000
JESD-30 code	R-PSSO-F3	R-PSSO-F3	R-PSSO-F3	R-PSSO-F3	R-PSSO-F3
Number of components	1	1	1	1	1
Number of terminals	3	3	3	3	3
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
Polarity/channel type	NPN	NPN	NPN	NPN	NPN
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
surface mount	YES	YES	YES	YES	YES
Terminal form	FLAT	FLAT	FLAT	FLAT	FLAT
Terminal location	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE
transistor applications	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER	AMPLIFIER
Transistor component materials	SILICON	SILICON	SILICON	SILICON	SILICON
Base Number Matches	1	1	1	1	1

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