531RC135M000DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 531RC135M000DG

531RC135M000DG: DescriptionLVPECL Output Clock Oscillator, 135MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531RC135M000DG Overview

LVPECL Output Clock Oscillator, 135MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531RC135M000DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	135 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Overflow alarm circuit

Application of current-voltage conversion circuit in variable frequency air conditioner

AC voltage regulating circuit working condition detection circuit

Circuit diagram to suppress capacitor discharge

UM93510 voice amplifier IC

Computer motherboard circuit diagram 440GX_35

Simple algorithm for multi-channel analog filtering (51 single-chip microcomputer): Dear friends: This is my first post, thank you. The microcontroller needs to collect 12 channels of 16-bit analog quantities. In order to stabilize the signal, filtering is required. Currently, 4 FLOA...; hanpan2713 MCU

TI Reference Design Selection--Hottest in the First Half of 2014: [color=#444444][font=Tahoma,]TI Designs reference design library provides complete design solutions, carefully created by a team of experienced engineers. Here, you can find comprehensive design solut...; qwqwqw2088 Analogue and Mixed Signal

【CH554 Review】Part 1: Unboxing, Hardware Review: [i=s]This post was last edited by yang_alex on 2017-10-3 17:12[/i] I am very happy to participate in the evaluation of the CH554 evaluation board. The express arrived just in time for the National Day...; yang_alex MCU

Philips digital photo frame has arrived in EEWORLD~~ (pictured above): I took a lot of photos excitedly, but unfortunately I didn't bring the connecting cable and I got dizzy.I'll post photos tomorrow. Hehe I like it very much :)...; soso DIY/Open Source Hardware

Wireless communication program implemented by MSP430F5529 and Bluetooth module: Does anyone have a wireless communication program implemented by MSP430F5529 and Bluetooth module? If so, please give me a reference. Thank you very much! ! ! !...; 六度分离xia Microcontroller MCU

WINCE GPRS dial-up Internet access speed is very slow: As the title says: WINCE GPRS dial-up Internet access speed is very slow. I use the IE that comes with WINCE5.0 to log in to the website, but the speed is very slow. If I connect the communication mod...; guduren222 Embedded System

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components