EEWORLDEEWORLDEEWORLD

Part Number

Search

531BA276M000DGR

Description
LVDS Output Clock Oscillator, 276MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531BA276M000DGR Overview

LVDS Output Clock Oscillator, 276MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531BA276M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency276 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Solution to insufficient RAM space in DSP28335
Because the RAM in DSP is mainly used to store data, but when using FFT algorithm, wavelet algorithm, etc., the data volume will be too large and the internal RAM space is simply not enough. There are...
fish001 DSP and ARM Processors
Urgent: Can the secondary of TLP627 be connected to 24V DC? Can the input terminal TTL level be driven?
As the title says, I need to control 24V DC. I am considering TLP627. The load is about 1-5K. I don't know if it can be realized. I want to use TTL control at the input end. The resistor is 1.1K. I do...
xy2002 Embedded System
Help: How to make a vxWorks boot disk
Please help me! After I inserted the boot disk, the monitor displayed: v1.6++++++++++++++++. After a few lines of plus signs, it stopped there. My target machine processor is p3, and the network card ...
藤堂香澄 Real-time operating system RTOS
Understanding the FSM Finite State Machine of LSM6DSOX -- Introduction to State Machine Instructions, with Chinese Instruction Set
[i=s]This post was last edited by justd0 on 2020-4-23 00:06[/i]In the article LSM6DSOX Unboxing and Experience "Port not opennot supported" Problem Solving, I shared the process of trying to use the L...
justd0 ST MEMS Sensor Creative Design Competition
Show the design plan + DIY expansion board, WAV playback.
(Note: The camera is not very good, and it was taken at night, so the effect is very poor, please don't criticize:congratulate:) In fact, there is nothing substantial on this expansion board. The main...
lcofjp stm32/stm8
Willful DIY - Naked technical life: stripping off the clothes of SMTP
[font=Arial][color=#333333] Before writing this post, I published a post discussing SMTP implementation, and the feedback from everyone was quite enthusiastic. Today, let's talk about what SMTP is. [/...
wateras1 RF/Wirelessly

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2474  2699  1259  1137  2861  50  55  26  23  58 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号