CAT28LV256GA-30 datasheet, PDF

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CAT28LV256GA-30: DescriptionEEPROM, 32KX8, 300ns, Parallel, CMOS, PQCC32, LEAD FREE, PLASTIC, LCC-32; Categorystorage storage; File Size66KB，12 Pages; ManufacturerCatalyst; Websitehttp://www.catalyst-semiconductor.com/; Environmental Compliance

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CAT28LV256GA-30 Overview

EEPROM, 32KX8, 300ns, Parallel, CMOS, PQCC32, LEAD FREE, PLASTIC, LCC-32

CAT28LV256GA-30 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Catalyst
Parts packaging code	QFJ
package instruction	QCCJ, LDCC32,.5X.6
Contacts	32
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	300 ns
command user interface	NO
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PQCC-J32
JESD-609 code	e3
length	13.97 mm
memory density	262144 bit
Memory IC Type	EEPROM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
organize	32KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	RECTANGULAR
Package form	CHIP CARRIER
page size	64 words
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	3.55 mm
Maximum standby current	0.00015 A
Maximum slew rate	0.015 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
switch bit	YES
width	11.43 mm
Maximum write cycle time (tWC)	10 ms

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CAT28LV256

256K-Bit CMOS PARALLEL E

PROM

FEATURES

3.0V to 3.6V Supply

Read Access Times: 200/250/300 ns

Low Power CMOS Dissipation:

CMOS and TTL Compatible I/O

Automatic Page Write Operation:

GEN

ALO

– Active: 15 mA Max.

– Standby: 150

A Max.

Simple Write Operation:

– 1 to 64 Bytes in 10ms

– Page Load Timer

End of Write Detection:

– On-Chip Address and Data Latches

– Self-Timed Write Cycle with Auto-Clear

Fast Write Cycle Time:

– Toggle Bit

–

DATA

Polling

Hardware and Software Write Protection

100,000 Program/Erase Cycles

100 Year Data Retention

– 10ms Max.

Commercial, Industrial and Automotive

Temperature Ranges

DESCRIPTION

The CAT28LV256 is a fast, low power, low voltage

CMOS Parallel E

PROM organized as 32K x 8-bits. It

requires a simple interface for in-system programming.

On-chip address and data latches, self-timed write cycle

with auto-clear and V

power up/down write protection

eliminate additional timing and protection hardware.

DATA

Polling and Toggle status bits signal the start and

end of the self-timed write cycle. Additionally, the

CAT28LV256 features hardware and software write

protection.

The CAT28LV256 is manufactured using Catalyst’s

advanced CMOS floating gate technology. It is designed

to endure 100,000 program/erase cycles and has a data

retention of 100 years. The device is available in JEDEC–

approved 28-pin DIP, 28-pin TSOP or 32-pin PLCC

packages.

BLOCK DIAGRAM

A6–A14

ADDR. BUFFER

& LATCHES

INADVERTENT

WRITE

PROTECTION

ROW

DECODER

32,768 x 8

PROM

ARRAY

64 BYTE PAGE

VCC

HIGH VOLTAGE

GENERATOR

CONTROL

LOGIC

I/O BUFFERS

TIMER

DATA POLLING

AND

TOGGLE BIT

COLUMN

DECODER

28LV256 F01

I/O0–I/O7

A0–A5

ADDR. BUFFER

& LATCHES

Characteristics subject to change without notice

Doc. No. 1071, Rev. B

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