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FST3253 Dual 4:1 Multiplexer/Demultiplexer Bus Switch
September 1997
Revised December 1999
FST3253
Dual 4:1 Multiplexer/Demultiplexer Bus Switch
General Description
The Fairchild Switch FST3253 is a dual 4:1 high-speed
CMOS TTL-compatible multiplexer/demultiplexer bus
switch. The low on resistance of the switch allows inputs to
be connected to outputs without adding propagation delay
or generating additional ground bounce noise.
When OE is LOW, S
0
and S
1
connect the A Port to the
selected B Port output. When OE is HIGH, the switch is
OPEN and a high-impedance state exists between the two
ports.
Features
s
4Ω switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
Ordering Code:
Order Number
FST3253M
FST3253QSC
FST3253MTC
Package Number
M16A
MQA16
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
Pin Descriptions
Pin Name
OE
1
, OE
2
S
0
, S
1
A
B
1
, B
2
, B
3
, B
4
Description
Bus Switch Enables
Select Inputs
Bus A
Bus B
S
1
X
X
L
L
H
H
S
0
X
X
L
H
L
H
OE
1
H
X
L
L
L
L
OE
2
X
H
L
L
L
L
Function
Disconnect 1A
Disconnect 2A
A
=
B
1
A
=
B
2
A
=
B
3
A
=
B
4
© 1999 Fairchild Semiconductor Corporation
DS500058
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FST3253
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
DC Switch Voltage (V
S
)
DC Input Voltage (V
IN
)(Note 2)
DC Input Diode Current (l
IK
) V
IN
<0V
DC Output (I
OUT
) Sink Current
DC V
CC
/GND Current (I
CC
/I
GND
)
Storage Temperature Range (T
STG
)
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−50mA
128mA
+/−
100mA
−65°C
to
+150 °C
Recommended Operating
Conditions
(Note 3)
Power Supply Operating (V
CC)
Input Voltage (V
IN
)
Output Voltage (V
OUT
)
Input Rise and Fall Time (t
r
, t
f
)
Switch Control Input
Switch I/O
Free Air Operating Temperature (T
A
)
0ns/V to 5ns/V
0ns/V to DC
−40 °C
to
−85 °C
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
Note 1:
The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2:
The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3:
Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
Symbol
V
IK
V
IH
V
IL
I
I
I
OZ
R
ON
Parameter
Clamp Diode Voltage
High Level Input Voltage
Low Level Input Voltage
Input Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 5)
V
CC
(V)
4.5
4.0–5.5
4.0–5.5
5.5
5.5
4.5
4.5
4.5
4.0
I
CC
∆
I
CC
Quiescent Supply Current
Increase in I
CC
per Input
5.5
5.5
4
4
8
11
2.0
0.8
±1.0
±1.0
7
7
15
20
3
2.5
T
A
= −40 °C
to
+85 °C
Min
Typ
(Note 4)
Units
Max
−1.2
V
V
V
µA
µA
Ω
Ω
Ω
Ω
µA
mA
0≤ V
IN
≤5.5V
0
≤A,
B
≤V
CC
V
IN
=
0V, I
IN
=
64mA
V
IN
=
0V, I
IN
=
30mA
V
IN
=
2.4V, I
IN
=
15mA
V
IN
=
2.4V, I
IN
=
15mA
V
IN
=
V
CC
or GND, I
OUT
=
0
One input at 3.4V
Other inputs at V
CC
or GND
Note 4:
Typical values are at V
CC
=
5.0V and T
A
= +25°C
Note 5:
Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
Conditions
I
IN
= −18mA
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2
FST3253
AC Electrical Characteristics
T
A
= −40 °C
to
+85 °C
C
L
=
50pF, RU
=
RD
=
500Ω
Symbol
Parameter
V
CC
=
4.5 – 5.5V
Min
t
PHL
,t
PLH
t
PZH
, t
PZL
t
PHZ
, t
PLZ
Prop Delay Bus to Bus (Note 6)
Prop Delay, Select to Bus A
Output Enable Time, Select to Bus B
Output Enable Time, I
OE
to Bus A, B
Output Disable Time., Select to Bus B
Output Disable Time, I
OE
to Bus A, B
1.0
1.0
1.0
1.0
1.0
Max
0.25
5.3
5.3
5.3
5.8
5.5
V
CC
=
4.0V
Min
Max
0.25
6.3
6.0
6.2
6.2
6.2
ns
ns
ns
V
I
=
OPEN
V
I
=
7V for t
PZL
V
I
=
OPEN for t
PZH
V
I
=
7V for t
PLZ
V
I
=
OPEN for t
PHZ
Figure 1
Figure 2
Figure 1
Figure 2
Figure 1
Figure 2
Units
Conditions
Figure No.
Note 6:
This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance
Symbol
C
IN
C
I/O
A Port
B Port
(Note 7)
Parameter
Typ
3
13
5
Max
Units
pF
pF
pF
Conditions
V
CC
=
5.0V
V
CC
, OE
=
5.0V
Control Pin Input Capacitance
Input/Output Capacitance
Note 7:
T
A
= +25°C,
f
=
1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note:
Input driven by 50
Ω
source terminated in 50
Ω
Note:
C
L
includes load and stray capacitance
Note:
Input PRR
=
1.0 MHz, t
W
=
500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
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FST3253
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
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