ST72321BR9TAX datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> ST72321BR9TAX

ST72321BR9TAX: DescriptionIC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,64PIN,PLASTIC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size2MB，244 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

Download Datasheet Parametric View All

ST72321BR9TAX Overview

IC,MICROCONTROLLER,8-BIT,ST72 CPU,CMOS,QFP,64PIN,PLASTIC

ST72321BR9TAX Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
package instruction	LFQFP, QFP64,.63SQ,32
Reach Compliance Code	compliant
Has ADC	YES
Address bus width
bit size	8
CPU series	ST72
maximum clock frequency	16 MHz
DMA channel	NO
External data bus width
JESD-30 code	S-PQFP-G64
length	14 mm
Number of I/O lines	48
Number of terminals	64
On-chip program ROM width	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Encapsulate equivalent code	QFP64,.63SQ,32
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
power supply	3.8/5.5 V
Certification status	Not Qualified
RAM (bytes)	2048
rom(word)	61440
ROM programmability	MROM
speed	8 MHz
Maximum slew rate	8 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

Preview

Download Datasheet

View All

ST72321Bxxx-Auto

8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM,

ADC, 5 timers, SPI, SCI, I2C interface

Features

Memories

■

32 to 60 Kbyte dual voltage High Density Flash

(HDFlash) ROM with readout protection

capability. In-application programming and in-

circuit programming for HDFlash devices

■

1 to 2 Kbyte RAM

■

HDFlash endurance: 100 cycles, data retention

20 years

LQFP64

10 x 10

LQFP64

14 x 14

LQFP44

10 x 10

Up to 48 I/O ports

■

Clock, reset and supply management

■

48/32/24 multifunctional bidirectional I/O lines

■

34/22/17 alternate function lines

■

16/12/10 high sink outputs

Enhanced low voltage supervisor (LVD) for

main supply and auxiliary voltage detector

(AVD) with interrupt capability

■

Clock sources: crystal/ceramic resonator

oscillators, internal RC oscillator and bypass

for external clock

■

PLL for 2x frequency multiplication

■

4 power saving modes: Halt, Active Halt, Wait

and Slow

5 timers

■

Interrupt management

■

Nested interrupt controller

■

14 interrupt vectors plus trap and reset

■

Top Level Interrupt (TLI) pin on 64-pin devices

■

15/9 external interrupt lines (on 4 vectors)

Main clock controller with Real-time base,

Beep and Clock-out capabilities

■

Configurable watchdog timer

■

Two 16-bit timers with 2 input captures, 2

output compares, external clock input on 1

timer, PWM and pulse generator modes

■

8-bit PWM auto-reload timer with 2 input

captures, 4 PWM outputs, output compare and

time base interrupt, external clock with event

detector

3 communications interfaces

■

1 analog peripheral (low current coupling)

■

SPI synchronous serial interface

■

SCI asynchronous serial interface

■

I C multimaster interface

10-bit ADC with up to 16 input ports

Development tools

■

Full HW/SW development pkg, ICT capability

Table 1.

Device summary

Prog. memory

Flash/ROM

60 Kbytes

Flash/ROM

48 Kbytes

Flash/ROM

32 Kbytes

RAM (stack)

2048 (256)

bytes

1536 (256)

bytes

1024 (256)

bytes

3.8 to 5.5V

Up to

-40 to 125°C

Oper. voltage Temp. range

Package

LQFP64

LQFP44

LQFP64

LQFP44

LQFP64

LQFP44

14x14

10x10

14x14

10x10

14x14

10x10

Device

ST72321BR9-Auto

ST72321BAR9-Auto

ST72321BJ9-Auto

ST72321BR7-Auto

ST72321BAR7-Auto

ST72321BJ7-Auto

ST72321BR6-Auto

ST72321BAR6-Auto

ST72321BJ6-Auto

September 2010

Doc ID 12898 Rev 2

1/244

www.st.com

Contents

ST72321Bxxx-Auto

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Package pinout and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.1

2.2

Package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Flash program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.3.1

Readout protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

ICC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

ICP (in-circuit programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

IAP (in-application programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Related documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Flash control/status register (FCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Central processing unit (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.1

5.2

5.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

CPU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Index registers (X and Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Program counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Condition code (CC) register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Stack pointer (SP) register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Supply, reset and clock management . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.1

6.2

6.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Phase locked loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

2/244

Doc ID 12898 Rev 2

ST72321Bxxx-Auto

Contents

6.4

6.5

Multi-oscillator (MO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Reset sequence manager (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.5.1

6.5.2

6.5.3

6.5.4

6.5.5

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Asynchronous external RESET pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

External power-on RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Internal low voltage detector (LVD) RESET . . . . . . . . . . . . . . . . . . . . . . 42

Internal watchdog RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

6.6

System integrity management (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6.6.1

6.6.2

6.6.3

6.6.4

6.6.5

Low voltage detector (LVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Auxiliary voltage detector (AVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

System Integrity (SI) Control/Status register (SICSR) . . . . . . . . . . . . . . 48

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

7.1

7.2

7.3

7.4

7.5

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Masking and processing flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Interrupts and low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Concurrent and nested management . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Interrupt register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

7.5.1

7.5.2

CPU CC register interrupt bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Interrupt software priority registers (ISPRx) . . . . . . . . . . . . . . . . . . . . . . 55

7.6

External interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

7.6.1

7.6.2

I/O port interrupt sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

External interrupt control register (EICR) . . . . . . . . . . . . . . . . . . . . . . . . 60

Power saving modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

8.1

8.2

8.3

8.4

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Slow mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Active Halt and Halt modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

8.4.1

8.4.2

Active Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

9.1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Doc ID 12898 Rev 2

3/244

Contents

ST72321Bxxx-Auto

9.2

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

9.2.1

9.2.2

9.2.3

Input modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Output modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

9.3

9.4

9.5

I/O port implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Watchdog timer (WDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

10.1

10.2

10.3

10.4

10.5

10.6

10.7

10.8

10.9

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

How to program the watchdog timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Hardware watchdog option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Using Halt mode with the WDG (WDGHALT option) . . . . . . . . . . . . . . . . 81

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

10.9.1

Control register (WDGCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Main clock controller with real-time clock and beeper (MCC/RTC) . . 83

11.1

11.2

11.3

11.4

11.5

11.6

11.7

11.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Programmable CPU clock prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Clock-out capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Real-time clock timer (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Main clock controller registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

11.8.1

11.8.2

MCC control/status register (MCCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . 85

MCC beep control register (MCCBCR) . . . . . . . . . . . . . . . . . . . . . . . . . 86

PWM auto-reload timer (ART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

12.1

12.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Doc ID 12898 Rev 2

4/244

ST72321Bxxx-Auto

12.2.1

12.2.2

12.2.3

12.2.4

12.2.5

12.2.6

12.2.7

12.2.8

12.2.9

Contents

Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Counter clock and prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Counter and prescaler initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Output compare control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

Independent PWM signal generation . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Output compare and time base interrupt . . . . . . . . . . . . . . . . . . . . . . . . 91

External clock and event detector mode . . . . . . . . . . . . . . . . . . . . . . . . 91

Input capture function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

External interrupt capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

12.3

ART registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

12.3.1

12.3.2

12.3.3

12.3.4

12.3.5

12.3.6

12.3.7

Control/status register (ARTCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Counter access register (ARTCAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Auto-reload register (ARTARR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

PWM control register (PWMCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Duty cycle registers (PWMDCRx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Input capture control / status register (ARTICCSR) . . . . . . . . . . . . . . . . 97

Input capture registers (ARTICRx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

16-bit timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

13.1

13.2

13.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

13.3.1

13.3.2

13.3.3

13.3.4

13.3.5

13.3.6

13.3.7

Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

External clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Input capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Output compare . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Forced compare output capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107

One Pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Pulse width modulation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

13.4

13.5

13.6

13.7

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

Summary of timer modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

16-bit timer registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

13.7.1

13.7.2

13.7.3

Control register 1 (CR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

Control register 2 (CR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

Control/status register (CSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

Doc ID 12898 Rev 2

5/244

Recommended Resources

Intelligent control module and 0-5V signal interface

+5V to +15V voltage converter circuit diagram

Detection angular displacement integrating circuit

Telephone anti-theft indicator circuit circuit diagram

Nokia 3300 mobile phone troubleshooting actual color picture (2)

Computer motherboard circuit diagram 820 1_29

Run vxworks on vmware, do as the Internet says, >make CPU="PENTIUM" tool="gnu" ln97xe prompts make is not recognized as an internal or external command: And in the path, has the location of make been added: \Tornado\target\config\82559? Copy the makefile ln97xEnd.c to the \Tornado\target\config\82559 folder, make, and it prompts that vxrm is not......; sucuiqin Real-time operating system RTOS

Selection and Application of Electrolytic Capacitors in Switching Power Supplies: Selection and Application of Electrolytic Capacitors in Switching Power Supplies[b][size=3]Download address: [url]https://download.eeworld.com.cn/detail/qwqwqw2088/261490[/url][/size][/b] [b][url=http...; qwqwqw2088 Analogue and Mixed Signal

Amazon statistics show that e-book sales are 1.8 times that of paper books: [i=s]This post was last edited by jameswangsynnex on 2015-3-3 19:57[/i] According to foreign media reports, Amazon recently announced that the company's e-book sales for the e-book reader KINDLE in Ju...; 探路者 Mobile and portable

Predictive Maintenance—Plant Managers, You Deserve It!: Occasionally checking your home’s heating, ventilation and air conditioning system is a good example of preventive maintenance, which is also important to keep these machines running smoothly. But wha...; soso Microcontroller MCU

DCDC input capacitance waveform: Today I tested the power supply output ripple, and on a whim I tested the waveform at the input end. The IC I used was LM5007, and the circuit was the same as the recommended circuit in the data sheet...; Kkk- Power technology

What are AT commands developed based on?: I want to send my own control commands through the 3G network, but it seems that AT commands cannot satisfy me. Can any expert give me an answer?...; lafargefox Embedded System

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components