BST72A
N-channel enhancement mode field-effect transistor
Rev. 03 — 25 July 2000
Product specification
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™
1
technology.
Product availability:
BST72A in SOT54 (TO-92 variant).
2. Features
s
TrenchMOS™ technology
s
Very fast switching
s
Logic level compatible.
3. Applications
s
Relay driver
s
High speed line driver
s
Logic level translator.
c
c
4. Pinning information
Table 1:
Pin
1
2
3
Pinning - SOT54, simplified outline and symbol
Description
source (s)
gate (g)
drain (d)
g
03ab40
Simplified outline
Symbol
d
3 21
s
03ab30
SOT54 (TO-92 variant)
N-channel MOSFET
1.
TrenchMOS is a trademark of Royal Philips Electronics.
Philips Semiconductors
BST72A
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
j
= 25 to 150
°C
T
amb
= 25
°C;
V
GS
= 5 V
T
amb
= 25
°C
V
GS
= 5 V; I
D
= 150 mA
Typ
−
−
−
−
5
Max
100
190
0.83
150
10
Unit
V
mA
W
°C
Ω
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
T
amb
= 25
°C;
V
GS
= 5 V;
Figure 2
and
3
T
amb
= 100
°C;
V
GS
= 5 V;
Figure 2
I
DM
P
tot
T
stg
T
j
I
S
I
SM
peak drain current
total power dissipation
storage temperature
operating junction temperature
source (diode forward) current (DC)
peak source (diode forward) current
T
amb
= 25
°C
T
amb
= 25
°C;
pulsed; t
p
≤
10
µs
T
amb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
amb
= 25
°C;
Figure 1
Conditions
T
j
= 25 to 150
°C
T
j
= 25 to 150
°C;
R
GS
= 20 kΩ
Min
−
−
−
−
−
−
−
−65
−65
−
−
Max
100
100
±20
190
120
0.8
0.83
+150
+150
190
0.8
Unit
V
V
V
mA
mA
A
W
°C
°C
mA
A
Source-drain diode
9397 750 07296
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 03 — 25 July 2000
2 of 13
Philips Semiconductors
BST72A
N-channel enhancement mode field-effect transistor
120
03aa11
03aa19
120
I
der
100
(%)
Pder 100
(%)
80
80
60
60
40
40
20
20
0
0
25
50
75
100
125
150
175
o
Tamb ( C)
0
0
25
50
75
100
125 150 175
o
Tamb ( C)
P
tot
P
der
=
----------------------
×
100%
P
°
tot
(
25 C
)
V
GS
≥
5 V
I
D
I
der
=
------------------
×
100%
-
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of ambient temperature.
1
ID
(A)
RDSon = VDS/ ID
Fig 2. Normalized continuous drain current as a
function of ambient temperature.
03aa62
tp = 10
µs
100
µs
1 ms
10 ms
100 ms
D.C.
10-1
10-2
P
δ
=
tp
T
tp
T
t
Ta = 25oC
10
102
103
10-3
1
VDS (V)
T
amb
= 25
°C;
I
DM
is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07296
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 03 — 25 July 2000
3 of 13
Philips Semiconductors
BST72A
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions
vertical in still air; lead
length
≤
5 mm;
Figure 4
Value
150
Unit
K/W
7.1 Transient thermal impedance
103
Zth(j-a)
(K/W)
102
δ
= 0.5
0.2
0.1
0.05
0.02
1
single pulse
P
tp
T
03aa59
10
δ
=
tp
T
t
10-1
10-5
10-4
10-3
10-2
10-1
1
10
tp (s)
102
Vertical in still air.
Fig 4. Transient thermal impedance from junction to ambient as a function of pulse
duration.
9397 750 07296
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 03 — 25 July 2000
4 of 13
Philips Semiconductors
BST72A
N-channel enhancement mode field-effect transistor
8. Characteristics
Table 5: Characteristics
T
j
= 25
°
C unless otherwise specified
Symbol
V
(BR)DSS
Parameter
drain-source breakdown
voltage
Conditions
I
D
= 10
µA;
V
GS
= 0 V
T
j
= 25
°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°C
T
j
= 150
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 60 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 150
°C
I
GSS
R
DSon
gate-source leakage current
drain-source on-state
resistance
V
GS
=
±20
V; V
DS
= 0 V
V
GS
= 5 V; I
D
= 150 mA;
Figure 7
and
8
T
j
= 25
°C
T
j
= 150
°C
Dynamic characteristics
g
fs
C
iss
C
oss
C
rss
t
on
t
off
forward transconductance
input capacitance
output capacitance
reverse transfer capacitance
turn-on time
turn-off time
V
DD
= 50 V; R
D
= 250
Ω;
V
GS
= 10 V; R
G
= 50
Ω;
R
GS
= 50
Ω
I
S
= 300 mA; V
GS
= 0 V;
Figure 13
I
S
= 300 mA;
dI
S
/dt =
−100
A/µs;
V
GS
= 0 V; V
DS
= 25 V
V
DS
= 5 V; I
D
= 175 mA;
Figure 11
V
GS
= 0 V; V
DS
= 10 V;
f = 1 MHz;
Figure 12
−
−
−
−
−
−
350
25
8.5
5
3
12
−
40
15
10
10
15
mS
pF
pF
pF
ns
ns
−
−
5
−
10
23
Ω
Ω
−
−
−
0.01
−
10
1.0
10
100
µA
µA
nA
1
0.6
−
2
−
−
−
−
3.5
V
V
V
100
89
130
−
−
−
V
V
Min
Typ
Max
Unit
Static characteristics
Source-drain diode
V
SD
t
rr
Q
r
source-drain (diode forward)
voltage
reverse recovery time
recovered charge
−
−
−
0.95
30
30
1.5
−
−
V
ns
nC
9397 750 07296
© Philips Electronics N.V. 2000. All rights reserved.
Product specification
Rev. 03 — 25 July 2000
5 of 13
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