531SB979M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531SB979M000DGR

531SB979M000DGR: DescriptionLVDS Output Clock Oscillator, 979MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531SB979M000DGR Overview

LVDS Output Clock Oscillator, 979MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531SB979M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	979 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

RTS762 circuit

Basic application circuit diagram of TL431a Reference source circuit diagram

Frequency controlled switching power supply circuit diagram

Radiation dosimeter circuit diagram

Variable gain differential amplifier circuit

Computer motherboard circuit diagram 810 3_25

Urgent! Two MCU questions! (High score): I need the answers to these two questions urgently! I haven't touched microcontrollers for many years, so I'm completely clueless. Please help me! I'm waiting online. I'll give you the answers as soon...; 目怜心 Embedded System

Wince6.0 creates multiple languages CreateMui fails: _TESTNK\TeskBSP\RelDir\PXA270_TEST_ARMV4I_Release\0409\mui 复制代码 English: Custom OS, selected MUI and English and Chinese fonts, the default language is Chinese. The output after calling createmui 0409...; zhangdawei2000 Embedded System

Hotel digital TV transformation plan, for reference: Everyone, please take a look at this digital TV transformation plan. It was sent to me by a netizen. I will share it with you first, maybe you will also need it!Principle of the plan: Use more than 30...; 笨鸟 Industrial Control Electronics

Beijing Zhibolian Company recruits senior electronic engineers: Our company is recruiting hardware engineers to engage in the development of testing instruments. Focus on the collection, sorting and amplification of weak signals. 1. Bachelor degree or above; 2. El...; wwgfree Recruitment

COIDE and GCC Baidu network disk download--STM32F429Discovery DIY oscilloscope environment construction: [i=s]This post was last edited by kejoy on 2015-1-25 20:47[/i] I just saw @[color=#333333][backcolor=rgb(229, 237, 242)][size=12.380952835083px][url=https://home.eeworld.com.cn/space-uid-428269.html]s...; kejoy stm32/stm8

How to manage IAR network licenses?: BackgroundSince these IAR network licenses can be used by any user who has access to the license server, in some cases you do not want certain members to use these network licenses or only allow them ...; MamoYU Integrated technical exchanges

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components