The following document contains information on Cypress products.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-12547-7E
8-bit Microcontroller
CMOS
F MC-8L MB89530A Series
MB89535A/537A/537AC/538A/538AC/F538
MB89F538L/P538/PV530
■
DESCRIPTION
The MB89530A series is a one-chip microcontroller featuring the F
2
MC-8L core supporting low-voltage and high-
speed operation. Built-in peripheral functions include timers, serial interface, A/D converter, and external interrupt.
This product is an ideal general-purpose one-chip microcontroller for a wide variety of applications from household
to industrial equipment, as well as use in portable devices.
Note : F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
2
■
FEATURES
• Wide range of package options
•
QFP package (1.00 mm pitch)
•
Two types of LQFP packages (0.65 mm pitch, 0.50 mm pitch)
•
SH-DIP package (1.778 mm pitch)
•
BCC package (0.50 mm pitch)
• Low voltage, high-speed operating capability
Minimum instruction execution time 0.32
µs
(at base oscillator 12.5 MHz)
• F
2
MC-8L CPU Core
•
Instruction set optimized for controller operation
•
Multiplication/division instructions
•
16-bit calculation
•
Branching instructions with bit testing
•
Bit operation instructions, etc.
(Continued)
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2001-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.10
MB89530A Series
(Continued)
• Five timer systems
•
8-bit PWM timer with 2 channels (usable as either interval timer of PWM timer)
•
Pulse width count timer (supports continuous measurement or remote control receiving applications)
•
16-bit timer counter
•
21-bit time base timer
•
Watch prescaler (17-bit)
• UART
Synchronous or asynchronous operation, switchable
• 2 serial interfaces (Serial I/O)
Selection of transfer direction (specify MSB first or LSB first) for communication with a variety of devices
• 10-bit A/D converter (8 channels)
•
External clock input for startup support
•
Time base timer output for startup support (except MB89F538/F538L)
• Pulse generators (PPG) with 2-program capability
•
6-bit PPG with selection of pulse width and pulse period
•
12-bit PPG (2 channels) with selection of pulse width and pulse period
• I
2
C interface circuits
• External interrupt 1 (single-clock system : 4 channels, dual-clock system : 3 channels)
4 or 3 independent inputs, release enabled from standby mode (includes edge detection function)
• External interrupt 2 (except for MB89F538/F538L : 8 channels, MB89F538/F538L : 7 channels)
8 or 7 independent input, release enabled form standby mode (includes level edge detection function)
• Standby modes (low power consumption modes)
•
Stop mode (oscillator stops, virtually no power consumed)
•
Sleep mode (CPU stops, power consumption reduced to one-third)
•
Sub clock mode
•
Watch mode
• Watchdog timer reset
• I/O ports
•
Maximum ports
Single-clock system : Except MB89F538/F538L 53 ports
MB89F538/F538L
52 ports
Dual-clock system : Except MB89F538/F538L 51 ports
: MB89F538/F538L
50 ports
•
38 general-purpose I/O ports (CMOS) (MB89F538/F538L : 37 general-purpose I/O ports)
•
2 general-purpose I/O ports (N-ch open drain)
•
8 general-purpose output ports (N-ch open drain)
•
General-purpose input ports (CMOS) : single-clock system : 5 ports, dual-clock system : 3 ports
2
DS07-12547-7E
MB89530A Series
■
PRODUCT LINEUP
Part number
Parameter
Type
MB89535A
MB89537A/ MB89538A/
537AC
538AC
MB89F538/
MB89F538L
Flash product
MB89P538
One-time
programmable
product
MB89PV530
Evaluation
product
Mass produced (MASK ROM)
ROM capacity
48 Kbytes
×
48 Kbytes
×
16 Kbytes
×
32 Kbytes
×
48 Kbytes
×
8-bit
8-bit
8-bit
8-bit
8-bit
(built-in Flash)
(built-in ROM) 48 Kbytes
×
8-bit
(built-in
(built-in
(built-in
(write from
(write from
(external ROM) *
2
ROM)
ROM)
ROM)
general purpose general purpose
EPROM writer) EPROM writer)
512 bytes
×
8-bit
1 Kbyte
×
8-bit
1
RAM capacity
Operating
voltage
2 Kbytes
×
8-bit
MB89F538 :
3.5 V to 5.5 V
2.2 V to 5.5 V *
(MB89535A/537A/538A/537AC/538AC) MB89F538L :
2.4 V to 3.6 V *
1
Basic instructions
Instruction bit length
Instruction length
Data bit length
Minimum instruction execution time
Minimum interrupt processing time
Input ports
: 136
: 8 bits
: 1 bit to 3 bits
: 1, 8, 16 bits
: 0.32
µs /
12.5 MHz
: 2.88
µs /
12.5 MHz
2.7 V to 5.5 V
2.7 V
to
5.5 V
CPU functions
Ports
Peripheral functions
: single-clock system : 5 (4 also usable as external interrupts)
dual-clock system : 3 (3 also usable as external interrupts)
Output-only ports (N-ch open drain)
: 8 (8 also usable as A/D converter input)
I/O ports (N-ch open drain)
: 2 (2 also usable as SO2/SDA or SI2/SCL)
I/O ports (CMOS) (Except MB89F538/F538L)
: 38
I/O ports (CMOS) (MB89F538/F538L)
: 37 (21 have no other function)
Total (except MB89F538/F538L) : single-clock system : 53
dual-clock system : 51
Total (MB89F538/F538L)
: single-clock system : 52
dual-clock system : 50
Time base
timer
Watchdog
timer
21 bits
Interrupt periods at main clock oscillation frequency of 12.5 MHz
(approx. 0.655 ms, 2.621 ms, 20.97 ms, 335.5 ms)
Reset period of approx. 167.8 ms to 335.6 ms at main clock frequency of 12.5 MHz
Reset period of approx. 500 ms to 1000 ms at sub clock frequency of 32.768 kHz.
8-bit interval timer operation
(supports square wave output, operating clock period : 1, 8, 16, 64 t
inst
*
3
)
Pulse width measurement with 8-bit resolution (conversion period : 2
8
t
inst
*
3
to 2
8
×
64 t
inst
*
3
)
2 channels (can also be used as interval timer, can also be used as ch.1 output and ch.2 count
clock)
Interval times at 17-bit sub clock base frequency of 32.768 kHz
(approx. 31.25 ms, 0.25 s, 0.50 s, 1.00 s, 2.00 s, 4.00 s)
(Continued)
PWM timer
Watch prescaler
DS07-12547-7E
3
MB89530A Series
(Continued)
Part number
Parameter
MB89535A
MB89537A/
537AC
MB89538A/
538AC
MB89F538/
MB89F538L
MB89P538
MB89PV530
Pulse width
count timer
8-bit one-shot timer operation
(supports underflow output, operating clock period : 1, 4, 32 t
inst
*
3
, external)
8-bit reload timer operation
(supports square wave output, operating clock period : 1, 4, 32 t
inst
*
3
, external)
8-bit pulse width measurement operation
(continuous measurement, “H” width measurement, “L” width measurement,
↑
to
↑, ↓
to
↓,
“H”
width measurement and
↑
to↑)
16-bit timer operation (operating clock period : 1 t
inst
*
3
, external)
16-bit event counter operation (select rising, falling, or both edges)
16-bit
×
1 channel
8 bits length
Selection of LSB first or MSB first
Transfer clock (2, 8, 32 t
inst
*
3
, external)
CLK synchronous/CLK asynchronous data transfer capability (8, 9-bit with parity bit, or 7,8-bit
without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
CLK synchronous/CLK asynchronous data transfer capability (4, 6, 7, 8-bit with parity bit, or 5,
7, 8, 9-bit without parity bit) .
Built-in baud rate generator provides selection of 14 baud rate settings.
External clock output, 2-channel 8-bit PWM timer output also available for baud rate settings.
Single-clock system : 4 channels independent, dual-clock system : 3 channels independent.
Selection of rising, falling, or both edge detection.
Can be used for recovery from standby mode (edge detection also available in stop mode)
Except MB89F538/F538L : 8 channels, MB89F538/F538L : 7 channels
Can be used for recovery from standby mode.
Can generate square wave signals with programmable period.
6-bit
×
1 channel or 12-bit
×
2 channels.
16-bit timer/
counter
Serial I/O
Peripheral functions
UART/SIO
UART
External
interrupt 1
External
interrupt 2
6-bit PPG,
12-bit PPG
I
2
C bus
interface
1-channel , compatible with Intel System Administrator bus version 1.0 and
⎯
Philips I
2
C specifications.
2-line communications
(
on MB89PV530
/
P538
/
F538/F538L/537AC
/
538AC
)
10-bit resolution
×
8 channels.
A/D conversion functions (conversion time : 60 t
inst
*
3
)
A/D converter Supports repeated calls from external clock (except MB89F538/F538L) .
Supports repeated calls from internal clock.
Standard voltage input provided (AVR)
Sleep mode, stop mode, sub clock mode, watch mode.
CMOS
Standby modes
(power saving
modes)
Process
*1 : Depends on operating frequency.
*2 : Using external ROM and MBM27C512.
*3 : t
inst
represents instruction execution time. This can be selected as 1/4, 1/8, 1/16, 1/64 of the main clock cycle
or 1/2 of the sub clock cycle.
Note : MB89535A/537A/538A have no built-in I
2
C functions.
To use I
2
C functions, choose the MB89PV530/MB89P538/F538/F538L/537AC/538AC.
4
DS07-12547-7E
京公网安备 11010802033920号
EEWORLD
