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LV810FIT

Description
Low Skew Clock Driver, 810 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.209 INCH, SSOP-20
Categorylogic    logic   
File Size207KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

LV810FIT Overview

Low Skew Clock Driver, 810 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.209 INCH, SSOP-20

LV810FIT Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSSOP
package instructionSSOP, SSOP20,.3
Contacts20
Reach Compliance Codenot_compliant
series810
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length7.2 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
MaximumI(ol)0.012 A
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times10
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
power supply2.5 V
Prop。Delay @ Nom-Sup3.5 ns
propagation delay (tpd)3.5 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.2 ns
Maximum seat height2 mm
Maximum supply voltage (Vsup)2.625 V
Minimum supply voltage (Vsup)1.425 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width5.3 mm
minfmax133 MHz
DATASHEET
BUFFER/CLOCK DRIVER
Description
The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout
buffer. This device is specifically designed for data
communications clock management. The large fanout from
a single input line reduces loading on the input clock. The
TTL level outputs reduce noise levels on the part. Typical
applications are clock and signal distribution.
ICSLV810
Features
Packaged in 20-pin QSOP/SSOP
Split 1:10 fanout Buffer
Maximum skew between outputs of different packages
0.75 ns
Max propagation delay of 3.8 ns
Operating voltage of 1.5 V to 2.5 V on Bank A
Operating voltage of 1.5 V to 2.5 V on Banks B and C
Advanced, low power, CMOS process
Industrial temperature range -40° C to +85° C
3.3 V tolerant input when VDDA=2.5 V
Available in Pb (lead) free packaging
NOTE: EOL for non-green parts to occur on 5/13/10
per PDN U-09-01
Block Diagram
VDDA
CLK 1
CLK 2
CLK 3
CLK 4
CLKIN
CLK 5
CLK 6
CLK 7
CLK 8
CLK 9
CLK 10
VDDB
VDDC
IDT™ / ICS™
BUFFER/CLOCK DRIVER
1
ICSLV810
REV G 121709

LV810FIT Related Products

LV810FIT LV810RIT LV810FI LV810RI
Description Low Skew Clock Driver, 810 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.209 INCH, SSOP-20 Low Skew Clock Driver, 810 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.150 INCH, QSOP-20 Low Skew Clock Driver, 810 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.209 INCH, SSOP-20 Low Skew Clock Driver, 810 Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, 0.150 INCH, QSOP-20
Is it Rohs certified? incompatible incompatible incompatible incompatible
Parts packaging code SSOP QSOP SSOP QSOP
package instruction SSOP, SSOP20,.3 0.150 INCH, QSOP-20 SSOP, SSOP20,.3 0.150 INCH, QSOP-20
Contacts 20 20 20 20
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant
series 810 810 810 810
Input adjustment STANDARD STANDARD STANDARD STANDARD
JESD-30 code R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0 e0 e0
length 7.2 mm 8.65 mm 7.2 mm 8.65 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
MaximumI(ol) 0.012 A 0.012 A 0.012 A 0.012 A
Humidity sensitivity level 1 1 1 1
Number of functions 1 1 1 1
Number of terminals 20 20 20 20
Actual output times 10 10 10 10
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP SSOP SSOP SSOP
Encapsulate equivalent code SSOP20,.3 SSOP20,.25 SSOP20,.3 SSOP20,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
power supply 2.5 V 2.5 V 2.5 V 2.5 V
Prop。Delay @ Nom-Sup 3.5 ns 3.5 ns 3.5 ns 3.5 ns
propagation delay (tpd) 3.5 ns 3.5 ns 3.5 ns 3.5 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.2 ns 0.2 ns 0.2 ns 0.2 ns
Maximum seat height 2 mm 1.75 mm 2 mm 1.75 mm
Maximum supply voltage (Vsup) 2.625 V 2.625 V 2.625 V 2.625 V
Minimum supply voltage (Vsup) 1.425 V 1.425 V 1.425 V 1.425 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.635 mm 0.65 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL
width 5.3 mm 3.9 mm 5.3 mm 3.9 mm
minfmax 133 MHz 133 MHz 133 MHz 133 MHz
Maker IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology)

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