LPSLDL-250 datasheet, PDF - EEWORLD Datasheet

LPSLDL-250: DescriptionActive Delay Line, 1-Func, 1-Tap, True Output, TTL, PDIP4, 0.250 INCH HEIGHT, PLASTIC, MODULE, DIP-14/4; Categorylogic logic; File Size292KB，2 Pages; ManufacturerEngineered Components Co.

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LPSLDL-250 Overview

Active Delay Line, 1-Func, 1-Tap, True Output, TTL, PDIP4, 0.250 INCH HEIGHT, PLASTIC, MODULE, DIP-14/4

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Engineered Components Co.
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14/4
Reach Compliance Code	unknown
Other features	BURNED-IN TO LEVEL B OF MIL-STD-883; TYP. ICC = 16MA; MAX RISE TIME CAPTURED
series	LS
JESD-30 code	R-PDIP-T4
JESD-609 code	e0
length	20.32 mm
Logic integrated circuit type	ACTIVE DELAY LINE
Number of functions	1
Number of taps/steps	1
Number of terminals	4
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
programmable delay line	NO
Prop。Delay @ Nom-Sup	250 ns
Certification status	Not Qualified
Maximum seat height	6.35 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	250 ns
width	7.62 mm

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