LPR200DM12 datasheet, PDF - EEWORLD Datasheet

LPR200DM12: DescriptionPipeline Register, 16-Bit, CMOS, CDIP48, 0.600 INCH, SIDE BRAZED, HERMETIC SEALED, DIP-48; CategoryThe embedded processor and controller Microcontrollers and processors; File Size339KB，10 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LPR200DM12 Overview

Pipeline Register, 16-Bit, CMOS, CDIP48, 0.600 INCH, SIDE BRAZED, HERMETIC SEALED, DIP-48

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	DIP
package instruction	DIP, DIP48,.6
Contacts	48
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	PROGRAMMABLE MULTILEVEL REGISTER CONFIGURATIONS; ICC SPECIFIED @ 10MHZ
boundary scan	NO
maximum clock frequency	83.33 MHz
External data bus width	16
JESD-30 code	R-CDIP-T48
JESD-609 code	e0
length	60.96 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	48
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output data bus width	16
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP48,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	4.953 mm
Maximum slew rate	30 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15.24 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, PIPELINE REGISTER

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