DM74L51W datasheet, PDF - EEWORLD Datasheet

DM74L51W: DescriptionIC,LOGIC GATE,2/2-INPUT AND-NOR,L-TTL,FP,14PIN,CERAMIC; Categorylogic logic; File Size94KB，2 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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DM74L51W Overview

IC,LOGIC GATE,2/2-INPUT AND-NOR,L-TTL,FP,14PIN,CERAMIC

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
package instruction	DFP, FL14,.3
Reach Compliance Code	unknown
JESD-30 code	R-XDFP-F14
JESD-609 code	e0
Logic integrated circuit type	AND-OR-INVERT GATE
MaximumI(ol)	0.0036 A
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC
encapsulated code	DFP
Encapsulate equivalent code	FL14,.3
Package shape	RECTANGULAR
Package form	FLATPACK
Prop。Delay @ Nom-Sup	90 ns
Certification status	Not Qualified
Schmitt trigger	NO
surface mount	YES
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL

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