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BUK762R0-40C
N-channel TrenchMOS standard level FET
Rev. 02 — 20 August 2007
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using Philips Ultra High-Performance Automotive (UHP) TrenchMOS technology.
This product has been designed and qualified to the appropriate AEC standard for use in
Automotive critical applications.
1.2 Features
175
°C
rated
Q101 compliant
Low on-state resistance
Standard level compatible
1.3 Applications
12 V loads
General purpose power switching
Automotive systems
Motors, lamps, solenoids
1.4 Quick reference data
Table 1.
I
D
P
tot
R
DSon
Quick reference
Conditions
V
GS
= 10 V; T
mb
= 25
°C;
see
Figure 1
and
4
T
mb
= 25
°C;
see
Figure 2
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25
°C;
see
Figure 13
and
12
[1][2]
Symbol Parameter
drain current
total power dissipation
drain-source on-state
resistance
Min
-
-
-
Typ
-
-
1.7
Max
100
333
2
Unit
A
W
mΩ
Static characteristics
Avalanche ruggedness
E
DS(AL)S
non-repetitive
I
D
= 100 A; V
sup
≤
40 V;
drain-source avalanche R
GS
= 50
Ω;
V
GS
= 10 V;
energy
T
j(init)
= 25
°C;
inductive load
type unclamped inductive load
[1]
[2]
Continuous current is limited by package.
Refer to document 9397 750 12572 for further information.
-
-
1.2
J
NXP Semiconductors
BUK762R0-40C
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning
Symbol
G
D
S
D
Description
gate
drain
source
mounting base;
connected to drain
1
[1]
Simplified outline
mb
Graphic Symbol
D
G
mbb076
S
2
3
SOT404 (D2PAK)
[1]
It is not possible to make a connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK762R0-40C
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead SOT404
cropped)
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 25
°C;
V
GS
= 10 V; see
Figure 1
and
4
T
mb
= 100
°C;
V
GS
= 10 V; see
Figure 1
T
mb
= 25
°C;
V
GS
= 10 V; see
Figure 1
and
4
I
DM
P
tot
T
stg
T
j
peak drain current
total power dissipation
storage temperature
junction temperature
I
D
= 100 A; V
sup
≤
40 V; R
GS
= 50
Ω;
V
GS
= 10 V; T
j(init)
= 25
°C;
inductive load type
unclamped inductive load
see
Figure 3
[4][5]
[6][7]
[1]
[2][3]
[2][3]
Conditions
T
j
≥
25
°C;
T
j
≤
175
°C
R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-
-55
-55
-
Max
40
40
20
276
100
100
1104
333
175
175
1.2
Unit
V
V
V
A
A
A
A
W
°C
°C
J
T
mb
= 25
°C;
t
p
≤
10
μs;
duty type pulsed;
see
Figure 4
T
mb
= 25
°C;
see
Figure 2
Avalanche ruggedness
E
DS(AL)S
non-repetitive
drain-source avalanche
energy
E
DS(AL)R
repetitive drain-source
avalanche energy
-
-
J
BUK762R0-40C_2
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 20 August 2007
2 of 15
NXP Semiconductors
BUK762R0-40C
N-channel TrenchMOS standard level FET
Table 4.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Source-drain diode
I
S
I
SM
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Conditions
T
mb
= 25
°C
T
mb
= 25
°C
t
p
≤
10
μs;
duty type pulsed; T
mb
= 25
°C
[1]
[2][3]
Min
-
-
-
Max
276
100
1104
Unit
A
A
A
source current
peak source current
Current is limited by power dissipation chip rating.
Continuous current is limited by package.
Refer to document 9397 750 12572 for further information.
Maximum value not quoted. Repetitive rating defined in avalanche rating figure.
Single-pulse avalanche rating limited by maximum junction temperature of 175
°C.
Repetitive avalanche rating limited by an average junction temperature of 170
°C.
Refer to application note AN10273 for further information.
300
I
D
(A)
200
003aab004
120
P
der
(%)
80
03aa16
100
(1)
40
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(
°
C)
200
V
GS
10
V
P
der
=
P
tot
P
tot
(25°C )
× 100 %
(1) Capped at 100 A due to package.
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
BUK762R0-40C_2
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 20 August 2007
3 of 15
NXP Semiconductors
BUK762R0-40C
N-channel TrenchMOS standard level FET
10
3
I
AL
(A)
10
2
(1)
003aab013
(2)
10
(3)
1
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
(1) Single pulse;
T
mb
= 25
°C.
(2) Single pulse;
T
mb
= 150
°C.
(3) Repetitive.
Fig 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
10
4
I
D
(A)
10
3
limit R
DSon
= V
DS
/I
D
δ
= 10
μs
100
μs
(1)
003aab028
10
2
DC
10
1 ms
1
10 ms
100 ms
10
−1
10
−1
1
10
V
DS
(V)
10
2
T
mb
= 25
°C; I
DM
is single pulse
(1) Capped at 100 A due to package.
Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
BUK762R0-40C_2
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 20 August 2007
4 of 15
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