3N163, 3N164
P-CHANNEL
ENHANCEMENT MODE
MOSFET
FEATURES
VERY HIGH INPUT IMPEDANCE
HIGH GATE BREAKDOWN
ULTRA LOW LEAKAGE
FAST SWITCHING
LOW CAPACITANCE
ABSOLUTE MAXIMUM RATINGS
@ 25°C (unless otherwise stated)
Drain-Source or Drain-Gate Voltage
3N163
3N164
Drain Current
Storage Temperature
Power Dissipation TO-72 case
Power Dissipation SOT-143 case
-40V
-30V
50mA
-55ºC to +150ºC
375mW
2
350mW
3
SOT-143
TOP VIEW
TO-72
TOP VIEW
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
I
GSS
BV
DSS
BV
SDS
V
GS(th)
V
GS
I
DSS
I
SDS
R
DS(on)
I
D(on)
g
fs
g
og
C
iss
C
rss
C
oss
CHARACTERISTIC
Gate Leakage Current
T
A
=+125ºC
Drain-Source Breakdown Voltage
Source-Drain Breakdown Voltage
Threshold Voltage
Gate Source Voltage (on)
Zero Gate Voltage, Drain Current (off)
Zero Gate Voltage, Source Current
Drain-Source on Resistance
On Drain Current
Forward Transconductance
Output Admittance
Input Capacitance-Output Shorted
Reverse Transfer Capacitance
Output Capacitance Input Shorted
-5.0
2.0
-40
-40
-2.0
-3.0
-5.0
-6.5
-200
-400
250
-30
4.0
250
3.5
0.7
3.0
-3.0
1.0
3N163
MIN
-10
-25
-30
-30
-2.0
-3.0
-5.0
-6.5
-400
-800
300
-30
4.0
250
3.5
0.7
3.0
ohms
mA
mS
µS
pF
V
DS
=-15V
I
D
=-10mA
1
f=1MHz
pA
V
3N164
-10
-25
UNITS
pA
CONDITIONS
V
GS
=-40V, V
DS
=0 (3N163), V
SB
=0V
V
GS
=-30V, V
DS
=0 (3N164), V
SB
=0V
I
D
=-10µA
I
S
=-10µA
V
DS
=V
GS
V
DS
=-15V
V
DS
=-15V
V
SD
=-15V
V
GS
=-20V
V
DS
=-15V
V
DS
=-15V
V
GS
=0, V
BS
=0
V
GD
=0, V
BD
=0
I
D
=-10µA, V
SB
=0V
I
D
=-0.5mA, V
SB
=0V
V
GS
=0, V
SB
=0V
V
GS
=0, V
DB
=0V
I
D
=-100µA, V
SB
=0V
V
GS
=-10V, V
SB
=0V
I
D
=-10mA
f=1kHz
MAX MIN MAX
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201137 09/02/2014 Rev#A8 ECN# 3N163 3N164
SWITCHING CHARACTERISTICS T
A
=25°C and V
BS
=0 (unless otherwise noted)
SYMBOL
t
on
t
r
t
off
CHARACTERISTIC
Turn-On Delay Time
Rise Time
Turn-Off Time
3N163
MIN
12
24
50
3N164
12
24
50
UNITS
ns
CONDITIONS
V
DD
=-15V, V
SB
=0V
I
D(on)
=-10mA
1
R
G
=R
L
=1.4K
MAX MIN MAX
TYPICAL SWITCHING WAVEFORM
INPUT PULSE
Rise Time≤2ns
Pulse Width≥200ns
SAMPLING SCOPE
T
r
≤0.2ns
C
IN
≤2pF
R
IN
≥10M
Switching Times Test Circuit
NOTES:
1. For design reference only, not 100% tested.
2. Derate 3mW/ºC above 25ºC
3. Derate 3.5mW/ºC above 25ºC
4. All min/max limits are absolute numbers. Negative signs indicate electrical polarity only.
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality
discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the
director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro
Power Systems.
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201137 09/02/2014 Rev#A8 ECN# 3N163 3N164
京公网安备 11010802033920号
EEWORLD
