FS0809.H
STANDARD SCR
TO220-AB
On-State Current
8 Amp
Gate Trigger Current
< 4 mA to < 15 mA
Off-State Voltage
200 V ÷ 600 V
MT2
These series of
Silicon Controlled
R
ectifier use a high performance
PNPN technology.
MT1
MT2
G
These parts are intended for general
purpose applications where high gate
sensitivity is required using surface
mount technology.
Absolute Maximum Ratings, according to IEC publication No. 134
SYMBOL
PARAMETER
On-state Current
Average On-state Current
Non-repetitive On-State Current
Non-repetitive On-State Current
Fusing Current
Peak Reverse Gate Voltage
Peak Gate Current
Peak Gate Dissipation
Gate Dissipation
Operating Temperature
Storage Temperature
Soldering Temperature
CONDITIONS
180º Conduction Angle, T
c
= 110 ºC
Half Cycle,
Θ
= 180 º, T
C
= 110 ºC
Half Cycle, 60 Hz
Half Cycle, 50 Hz
t
p
= 10ms, Half Cycle
I
GR
= 10 µA
20 µs max.
20 µs max.
20ms max.
Min.
8
5
100
95
45
5
4
5
1
+125
+150
260
Max.
Unit
A
A
A
A
A
2
s
V
A
W
W
ºC
ºC
ºC
I
T(RMS)
I
T(AV)
I
TSM
I
TSM
I
2
t
V
GRM
I
GM
P
GM
P
G(AV)
T
j
T
stg
T
sld
SYMBOL
-40
-40
10s max.
PARAMETER
Repetitive Peak Off State
Voltage
CONDITIONS
R
GK
= 1 KΩ
B
200
VOLTAGE
D
400
M
600
Unit
V
V
DRM
V
RRM
Jun - 02
FS0809.H
STANDARD SCR
Electrical Characteristics
SYMBOL
PARAMETER
Gate Trigger Current
Off-State Leakage Current
On-state Voltage
Gate Trigger Voltage
Gate Non Trigger Voltage
Holding Current
CONDITIONS
MIN
MAX
MAX
MAX
MAX
MAX
MIN
MAX
MAX
MIN
MIN
SENSITIVITY
09
4
15
2
5
1.6
1.3
0.2
30
70
150
50
20
60
0.85
46
Unit
mA
mA
µA
V
V
V
mA
mA
V/µs
A/µs
ºC/W
ºC/W
V
mΩ
I
GT
I
DRM
/ I
RRM
V
TM
V
GT
V
GD
I
H
I
L
dv / dt
di / dt
R
th(j-c)
R
th(j-a)
V
D
= 12 V
DC
, R
L
= 140Ω. T
j
= 25 ºC
V
D
= V
DRM
, R
GK
= 220Ω T
j
= 125 ºC
V
R
= V
RRM
,
T
j
= 25 ºC
at I
T
= 16 Amp, tp = 380 µs, T
j
= 25 ºC
V
D
= 12 V
DC
, R
L
= 140Ω, T
j
= 25 ºC
V
D
= V
DRM
, R
L
= 3.3KΩ, R
GK
= 220Ω
T
j
= 125 ºC
I
T
= 100 mA , Gate open
I
G
= 1.2 I
GT
T
j
= 25 ºC
Latching Current
Critical Rate of Voltage Rise V
D
= 0.67 x V
DRM
, Gate open T
j
= 125 ºC
Critical Rate of Current Rise I
G
= 2 x I
GT
Trr
≤
100 ns, F = 60 Hz,
T
j
= 125 ºC
Thermal Resistance
Junction-Case for DC
Thermal Resistance
Junction-Amb for DC
Threshold Voltage
Dynamic resistance
T
j
= 125 ºC
T
j
= 125 ºC
V
t0
R
d
MAX
MAX
PART NUMBER INFORMATION
F
FAGOR
SCR
CURRENT
S
08
09
B
H
00
TU
PACKAGING
FORMING
CASE
VOLTAGE
SENSITIVITY
Jun - 02
FS0809.H
STANDARD SCR
Fig. 1: Maximum average power dissipation
versus average on-state current.
P (W)
10
10
D.C.
Fig. 2: Average and D.C. on-state current
versus case temperature.
I T(av) (A)
8
8
6
6
α
= 180 º
4
4
2
360 º
α
2
IT(av)(A)
0
0
1
2
3
4
5
6
7
0
0
25
50
75
100
125
T case (ºC)
Fig. 3: Relative variation of thermal impedance
junction to case versus pulse duration.
K = [Zth(j-c) / Rth (j-c)]
1.0
Fig. 4: Relative variation of gate trigger
current, holding and latching current versus
junction temperature.
IGT, IH (Tj) / IGT, IH (Tj = 25 ºC)
2.0
1.8
1.6
IGT
0.5
1.4
1.2
1.0
0.8
IH & IL
0.2
0.6
0.4
0.2
tp (s)
1E-2
1E-1
1E+0
Tj (ºC)
-40 -20 0
20 40 60 80 100 120 140
0.1
1E-3
0.0
Fig. 5: Non repetitive surge peak on-state
current versus number of cycles.
I TSM (A)
80
70
60
Tj initial = 25 ºC
F = 50 Hz
Fig. 6: Non repetitive surge peak on-state
current for a sinusoidal pulse with width:
tp < 10 ms, and corresponding value of I
2
t.
ITSM(A). I
2
t (A
2
s)
300
Tj initial = 25 ºC
ITSM
100
50
40
30
20
10
0
1
10
100
Number of
cycles
1000
10
1
2
5
10
tp(ms)
20
50
I
2
t
Jun - 02
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