I/O card insertion into a live backplane without corruption
of the data and clock busses. When the connection is
made, the LTC4300A-3 provides bidirectional buffering,
keeping the backplane and card capacitances isolated.
Rise-time accelerator circuitry allows the use of weaker
DC pull-up currents while still meeting rise-time require-
ments. During insertion, the SDA and SCL lines are
precharged to 1V to minimize bus disturbances.
The LTC4300A-3 provides level translation between 3.3V
and 5V supplies. The backplane and card can both be
powered with supplies ranging from 2.7V to 5.5V. The
LTC4300A-3 also incorporates a CMOS threshold ENABLE
pin which forces the part into a low current mode and iso-
lates the card from the backplane. When driven to V
CC
, the
ENABLE pin sets normal operation.
The LTC4300A-3 is available in the MSOP and 3mm
×
3mm
DFN packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
*Patent pending.
APPLICATIO S
■
■
■
■
Hot Board Insertion
Servers
Capacitance Buffer/Bus Extender
Desktop Computer
TYPICAL APPLICATIO
V
CC
3.3V
0.01µF
10k
10k
3
8
1
V
CC2
0.01µF
10k
2
10k
OUTPUT
SIDE
50pF
0.5V/DIV
Input–Output Connection
SCLIN
SCLOUT
SDAIN
6
7
SDAOUT
5
OFF ON
LTC4300A-3
ENABLE
GND
4
4300A-3
TA01
U
INPUT
SIDE
150pF
200ns/DIV
4300A TA02
U
U
sn4300a3 4300a3fs
1
LTC4300A-3
ABSOLUTE
AXI U RATI GS
V
CC
to GND .................................................... – 0.3 to 7V
V
CC2
to GND .................................................. – 0.3 to 7V
SDAIN, SCLIN, SDAOUT, SCLOUT ................. – 0.3 to 7V
ENABLE ......................................................... – 0.3 to 7V
Operating Temperature Range
LTC4300A-3C ......................................... 0°C to 70°C
LTC4300A-3I ...................................... – 40°C to 85°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V
CC2
1
SCLOUT 2
SCLIN 3
GND 4
9
8
7
6
5
V
CC
SDAOUT
SDAIN
ENABLE
ORDER PART
NUMBER
LTC4300A-3CDD
LTC4300A-3IDD
DD
PART MARKING*
LBHG
LBHG
TOP VIEW
V
CC2
SCLOUT
SCLIN
GND
1
2
3
4
8
7
6
5
V
CC
SDAOUT
SDAIN
ENABLE
DD PACKAGE
8-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 9) PCB CONNECTION IS OPTIONAL
Consult LTC marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specfications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC2
= 2.7V to 5.5V, unless otherwise noted.
SYMBOL PARAMETER
Power Supply
V
CC
V
CC2
I
SD
I
VCC1
I
VCC2
V
PRE
t
IDLE
V
EN
V
DIS
I
EN
t
PHL
t
PLH
Positive Supply Voltage
Card Side Supply Voltage
Supply Current in Shutdown Mode
V
CC
Supply Current
V
CC2
Supply Current
Precharge Voltage
Bus Idle Time
ENABLE Threshold Voltage
Disable Threshold Voltage
ENABLE Input Current
ENABLE Delay, On-Off
ENABLE Delay, Off-On
ENABLE Pin
ENABLE from 0V to V
CC
0.1 • V
CC
V
ENABLE
= 0V
V
SDAIN
= V
SCLIN
= 0V, V
CC1
= V
CC2
= 5.5V
V
SDAOUT
= V
SCLOUT
= 0V, V
CC1
= V
CC2
= 5.5V
SDA, SCL Floating
●
●
●
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
Start-Up Circuitry
0.8
50
1.0
95
0.5 • V
CC
0.5 • V
CC
±0.1
10
95
±1
1.2
150
0.9 • V
CC
V
µs
V
V
µA
ns
µs
2
U
U
W
W W
U
W
(Note 1)
Storage Temperature Range
MSOP ............................................... – 65°C to 150°C
DFN .................................................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)
MSOP Only ....................................................... 300°C
ORDER PART
NUMBER
LTC4300A-3CMS8
LTC4300A-3IMS8
MS8
PART MARKING
LTBHD
LTBHF
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 200°C/W
MIN
2.7
2.7
TYP
MAX
5.5
5.5
UNITS
V
V
µA
mA
mA
20
3
2.1
4.1
2.9
sn4300a3 4300a3fs
LTC4300A-3
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER
Rise-Time Accelerators
I
PULLUPAC
Transient Boosted Pull-Up Current
Input-Output Connection
V
OS
f
SCL, SDA
C
IN
V
OL
I
LEAK
f
I2C
t
BUF
t
hD,STA
t
su,STA
t
su,STO
t
hD, DAT
t
su, DAT
t
LOW
t
HIGH
t
f
t
r
Input-Output Offset Voltage
Operating Frequency
Digital Input Capacitance
Output Low Voltage, Input = 0V
Input Leakage Current
I
2
C Operating Frequency
Bus Free Time Between Stop
and Start Condition
Hold Time After (Repeated)
Start Condition
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
Clock, Data Fall Time
Clock, Data Rise Time
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specfications are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
CC2
= 2.7V to 5.5V, unless otherwise noted.
CONDITIONS
Positive Transition on SDA, SCL, V
CC
= 2.7V,
V
CC2
= 2.7V, Slew Rate = 1.25V/µs (Note 2)
10k to V
CC
on SDA, SCL, V
CC
= 3.3V (Note 3),
V
CC2
= 3.3V, V
IN
= 0.2V
Guaranteed by Design, Not Subject to Test
Guaranteed by Design, Not Subject to Test
SDA, SCL Pins, I
SINK
= 3mA, V
CC
= 2.7V,
V
CC2
= 2.7V
SDA, SCL Pins = V
CC
= 5.5V, V
CC2
= 5.5V
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Notes 4, 5)
(Notes 4, 5)
0
1.3
0.6
0.6
0.6
300
100
1.3
0.6
20 + 0.1 • C
B
20 + 0.1 • C
B
Note 4:
Guaranteed by design, not subject to test.
Note 5:
C
B
= total capacitance of one bus line in pF.
300
300
●
●
MIN
1
TYP
2
MAX
UNITS
mA
0
0
0
100
175
400
10
0.4
±5
400
mV
kHz
pF
V
µA
kHz
µs
µs
µs
µs
ns
ns
µs
µs
ns
ns
Timing Characteristics
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
I
PULLUPAC
varies with temperature and V
CC
voltage, as shown in
the Typical Performance Characteristics section.
Note 3:
The connection circuitry always regulates its output to a higher
voltage than its input. The magnitude of this offset voltage as a function of
the pullup resistor and V
CC
voltage is shown in the Typical Performance
Characteristics section.
sn4300a3 4300a3fs
3
LTC4300A-3
TYPICAL PERFOR A CE CHARACTERISTICS
I
CC
vs Temperature
5.3
5.2
5.1
5.0
I
CC
(mA)
t
PHL
(ns)
V
CC
= 5.5V
80
4.9
4.8
4.7
4.6
4.5
4.4
4.3
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
V
CC
= 2.7V
60
I
PULLUPAC
(mA)
Connection Circuitry V
OUT
– V
IN
300
250
V
OUT
– V
IN
(mV)
200
150
V
CC
= 5V
100
V
CC
= 3.3V
50
0
5
0
–50
I
SD
(µA)
0
10,000
4
U W
4300-3 G01
Input–Output High to Low
Propagation Delay vs Temperature
100
V
CC
= 2.7V
10
V
CC
= 3.3V
8
6
4
2
12
I
PULLUPAC
vs Temperature
V
CC
= 5V
40
V
CC
= 5.5V
V
CC
= 3V
20
C
IN
= C
OUT
= 100pF
R
PULLUPIN
= R
PULLUPOUT
= 10k
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
V
CC
= 2.7V
0
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
4300-3 G02
4300-3 G03
I
SD
vs Temperature
35
30
V
CC
= 5.5V
25
20
15
10
V
CC
= 2.7V
T
A
= 25°C
V
IN
= 0V
20,000
30,000
R
PULLUP
(Ω)
40,000
4300-3 G04
–25
50
25
0
TEMPERATURE (°C)
75
100
4300A G05
sn4300a3 4300a3fs
LTC4300A-3
PI FU CTIO S
V
CC2
(Pin 1):
Card Supply Voltage. This is the supply
voltage for the devices on the card I
2
C busses. Connect
pull-up resistors from SDAOUT and SCLOUT to this pin.
Place a bypass capacitor of at least 0.01µF close to this pin
for best results.
SCLOUT (Pin 2):
Serial Clock Output. Connect this pin to
the SCL bus on the card.
SCLIN (Pin 3):
Serial Clock Input. Connect this pin to the
SCL bus on the backplane.
GND (Pin 4):
Device Ground. Connect this pin to a ground
plane for best results.
ENABLE (Pin 5):
Digital CMOS Threshold Input. Ground-
ing this pin puts the part in a low current mode. It also
disables the rise-time accelerators, disables the bus
discharge circuitry, isolates SDAIN from SDOUT and
isolates SCLIN from SCLOUT. For active operation, drive
this pin to V
CC
. If this feature is unused, tie to V
CC
. Since
ENABLE is V
CC
referenced, do not connect to V
CC2
or pull
up to V
CC2
.
SDAIN (Pin 6):
Serial Data Input. Connect this pin to the
SDA bus on the backplane.
SDAOUT (Pin 7):
Serial Data Output. Connect this pin to
the SDA bus on the card.
V
CC
(Pin 8):
Main Input Power Supply from Backplane.
This is the supply voltage for the devices on the backplane
I
2
C busses. Connect pull-up resistors from SDAIN and
SCLIN to this pin. Place a bypass capacitor of at least
0.01µF close to this pin for best results.
Exposed Pad (Pin 9, DFN Package Only):
Exposed Pad
may by be left open or connected to device ground.
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