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LM3524DMDC

Description
Switching Controller, 0.2A, 350kHz Switching Freq-Max, DIE
CategoryPower/power management    The power supply circuit   
File Size1MB,22 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
Download Datasheet Parametric View All

LM3524DMDC Overview

Switching Controller, 0.2A, 350kHz Switching Freq-Max, DIE

LM3524DMDC Parametric

Parameter NameAttribute value
MakerRochester Electronics
package instructionDIE,
Reach Compliance Codeunknown
ECCN codeEAR99
Analog Integrated Circuits - Other TypesSWITCHING CONTROLLER
Maximum input voltage40 V
Minimum input voltage8 V
Nominal input voltage20 V
JESD-30 codeX-XUUC-N
Number of functions1
Maximum output current0.2 A
Package body materialUNSPECIFIED
encapsulated codeDIE
Package shapeUNSPECIFIED
Package formUNCASED CHIP
surface mountYES
Switch configurationPUSH-PULL
Maximum switching frequency350 kHz
Terminal formNO LEAD
Terminal locationUPPER
LM2524D/LM3524D Regulating Pulse Width Modulator
May 2, 2008
LM2524D/LM3524D
Regulating Pulse Width Modulator
General Description
The LM3524D family is an improved version of the industry
standard LM3524. It has improved specifications and addi-
tional features yet is pin for pin compatible with existing 3524
families. New features reduce the need for additional external
circuitry often required in the original version.
The LM3524D has a ±1% precision 5V reference. The current
carrying capability of the output drive transistors has been
raised to 200 mA while reducing V
CEsat
and increasing V
CE
breakdown to 60V. The common mode voltage range of the
error-amp has been raised to 5.5V to eliminate the need for
a resistive divider from the 5V reference.
In the LM3524D the circuit bias line has been isolated from
the shut-down pin. This prevents the oscillator pulse ampli-
tude and frequency from being disturbed by shut-down. Also
at high frequencies (≃300 kHz) the max. duty cycle per output
has been improved to 44% compared to 35% max. duty cycle
in other 3524s.
In addition, the LM3524D can now be synchronized external-
ly, through pin 3. Also a latch has been added to insure one
pulse per period even in noisy environments. The LM3524D
includes double pulse suppression logic that insures when a
shut-down condition is removed the state of the T-flip-flop will
change only after the first clock pulse has arrived. This feature
prevents the same output from being pulsed twice in a row,
thus reducing the possibility of core saturation in push-pull
designs.
Features
Fully interchangeable with standard LM3524 family
±1% precision 5V reference with thermal shut-down
Output current to 200 mA DC
60V output capability
Wide common mode input range for error-amp
One pulse per period (noise suppression)
Improved max. duty cycle at high frequencies
Double pulse suppression
Synchronize through pin 3
Connection Diagram
865002
Top View
Order Number LM2524DN or LM3524DN
See NS Package Number N16E
Order Number LM3524DM
See NS Package Number M16A
© 2008 National Semiconductor Corporation
8650
www.national.com

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