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GVT7364A16TS-20I

Description
Standard SRAM, 64KX16, 20ns, CMOS, PDSO44
Categorystorage    storage   
File Size48KB,11 Pages
ManufacturerCypress Semiconductor
Download Datasheet Parametric View All

GVT7364A16TS-20I Overview

Standard SRAM, 64KX16, 20ns, CMOS, PDSO44

GVT7364A16TS-20I Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerCypress Semiconductor
package instructionTSOP2-44
Reach Compliance Codecompliant
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-G44
JESD-609 codee0
length18.56 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals44
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize64KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSOP44,.46,32
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum standby current0.01 A
Minimum standby current3 V
Maximum slew rate0.1 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
GALVANTECH
, INC.
ASYNCHRONOUS
SRAM
FEATURES
Fast access times: 10, 12, 15 and 20ns
Fast OE# access times: 5, 6, 7 and 8ns
Single +3.3V +0.3V power supply
Fully static -- no clock or timing strobes necessary
All inputs and outputs are TTL-compatible
Three state outputs
Center power and ground pins for greater noise immunity
Easy memory expansion with CE# and OE# options
Automatic CE# power down
High-performance, low-power consumption, CMOS
double-poly, double-metal process
Packaged in 44-pin, 400-mil SOJ and 44-pin, 400-mil
TSOP
GVT7364A16
REVOLUTIONARY PINOUT 64K X 16
64K x 16 SRAM
+3.3V SUPPLY, SINGLE CHIP ENABLE
REVOLUTIONARY PINOUT
GENERAL DESCRIPTION
The GVT7364A16 is organized as a 65,536 x 16 SRAM
using a four-transistor memory cell with a high performance,
silicon gate, low-power CMOS process. Galvantech SRAMs
are fabricated using double-layer polysilicon, double-layer
metal technology.
This device offers center power and ground pins for
improved performance and noise immunity. Static design
eliminates the need for external clocks or timing strobes. For
increased system flexibility and eliminating bus contention
problems, this device offers chip enable (CE#), separate byte
enable controls (BLE# and BHE#) and output enable (OE#)
with this organization.
The device offers a low power standby mode when chip
is not selected. This allows system designers to meet low
standby power requirements.
OPTIONS
Timing
10ns access
12ns access
15ns access
20ns access
Packages
44-pin SOJ (400 mil)
44-pin TSOP (400 mil)
Power consumption
Standard
Low
Temperature
Commercial
Industrial
MARKING
-10
-12
-15
-20
PIN ASSIGNMENT
44-Pin SOJ
44-Pin TSOP
A4
A3
A2
A1
A0
CE#
DQ1
DQ2
DQ3
DQ4
VCC
VSS
DQ5
DQ6
DQ7
DQ8
WE#
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
J
TS
None
L
None
I
(
0°C
to
70°C)
(
-40°C
to
85°C)
A5
A6
A7
OE#
BHE#
BLE#
DQ16
DQ15
DQ14
DQ13
VSS
VCC
DQ12
DQ11
DQ10
DQ9
NC
A8
A9
A10
A11
NC
Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051
Tel (408) 566-0688 Fax (408) 566-0699 Web Site http://www.galvantech.com
Rev. 11/9 9
Galvantech, Inc. reserves the right to chang e
products or specifications without notice.

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