Dual Bootstrapped, 12 V MOSFET
Driver with Output Disable
ADP3418
FEATURES
All-in-one synchronous buck driver
Bootstrapped high-side drive
1 PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs to float the
output per Intel® VR 10 and AMD Opteron™ specifications
GENERAL DESCRIPTION
The ADP3418 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, the two switches in a
nonisolated, synchronous, buck power converter. Each of the
drivers is capable of driving a 3000 pF load with a 30 ns
transition time. One of the drivers can be bootstrapped and is
designed to handle the high voltage slew rate associated with
floating high-side gate drivers. The ADP3418 includes
overlapping drive protection to prevent shoot-through current
in the external MOSFETs. The OD pin shuts off both the high-
side and the low-side MOSFETs to prevent rapid output
capacitor discharge during system shutdowns.
The ADP3418 is specified over the commercial temperature
range of 0°C to 85°C and is available in an 8-lead SOIC package.
APPLICATIONS
Multiphase desktop CPU supplies
Single-supply synchronous buck converters
FUNCTIONAL BLOCK DIAGRAM
12V
C
VCC
VCC
4
D1
C
BST2
C
BST1
Q1
R
G
R
BST1
7
ADP3418
1
BST
DRVH
IN
2
8
DELAY
SW
TO
INDUCTOR
CMP
S
R
Q
Q
DELAY
VCC
6
5
DRVL
PGND
Q2
CMP
1V
6
3
OD
Figure 1.
©2010 SCILLC. All rights reserved.
May 2010 – Rev. 6
Publication Order Number:
ADP3418/D
03229-B-001
ADP3418
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Timing Characteristics..................................................................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ........................................................................ 9
Low-Side Driver............................................................................ 9
High-Side Driver ...........................................................................9
Overlap Protection Circuit...........................................................9
Application Information ................................................................ 10
Supply Capacitor Selection ....................................................... 10
Bootstrap Circuit ........................................................................ 10
MOSFET Selection ..................................................................... 10
High-Side (Control) MOSFETs ................................................ 10
Low-Side (Synchronous) MOSFETs .........................................11
PC Board Layout Considerations..............................................11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
Rev. 6 | Page 2 of 13 | www.onsemi.com
ADP3418
SPECIFICATIONS
1
V
CC
= 12 V, BST = 4 V to 26 V, T
A
= 0°C to 85°C, unless otherwise noted.
Table 1.
Parameter
SUPPLY
Supply Voltage Range
Supply Current
OD INPUT
Input Voltage High
Input Voltage Low
Input Current
Propagation Delay Time
PWM INPUT
Input Voltage High
Input Voltage Low
Input Current
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay
2
LOW-SIDE DRIVER
Output Resistance, Sourcing Current
Output Resistance, Sinking Current
Transition Times
Propagation Delay
2
Timeout Delay
Symbol
V
CC
I
SYS
Conditions
Min
4.15
BST = 12 V, IN = 0 V
2.6
−1
t
pdhOD
t
pdlOD
See Figure 3
See Figure 3
3.0
−1
V
BST
− V
SW
= 12 V
V
BST
− V
SW
= 12 V
See Figure 4, V
BST
− V
SW
= 12 V, C
LOAD
= 3 nF
See Figure 4, V
BST
− V
SW
= 12 V, C
LOAD
= 3 nF
See Figure 4, V
BST
− V
SW
= 12 V
V
BST
− V
SW
= 12 V
1.8
1.0
35
20
40
20
1.8
1.0
25
21
30
10
240
120
0.8
+1
3.0
2.5
45
30
65
35
3.0
2.5
35
30
60
20
25
20
0.8
+1
40
40
3
Typ
Max
13.2
6
Unit
V
mA
V
V
µA
ns
ns
V
V
µA
Ω
Ω
ns
ns
ns
ns
Ω
Ω
ns
ns
ns
ns
ns
ns
t
rDRVH
t
fDRVH
t
pdhDRVH
t
pdlDRVH
10
t
rDRVL
t
fDRVL
t
pdhDRVL
t
pdlDRVL
See Figure 4, C
LOAD
= 3 nF
See Figure 4, C
LOAD
= 3 nF
See Figure 4
See Figure 4
SW = 5 V
SW = PGND
5
90
1
2
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
For propagation delays, t
pdh
refers to the specified signal going high, and t
pdl
refers to it going low.
Rev. 6 | Page 3 of 13 | www.onsemi.com
ADP3418
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
VCC
BST
DC
<200 ns
BST to SW
SW
DC
<200 ns
DRVH (DC)
DRVH (<200 ns)
DRVL (DC)
DRVL (<200 ns)
IN, OD
Operating Ambient
Temperature Range
Operating Junction
Temperature Range
Storage Temperature Range
Junction-to-Air Thermal Resistance (θ
JA
)
2-Layer Board
4-Layer Board
Lead Temperature (Soldering, 10 sec)
Infrared (15 sec)
Rating
−0.3 V to +15 V
−0.3 V to V
CC
+ 15 V
−0.3 V to +36 V
−0.3 V to +15 V
−5 V to +15 V
−10 V to +25 V
SW − 0.3 V to BST + 0.3 V
SW − 2 V to BST + 0.3 V
−0.3 V to V
CC
+ 0.3 V
−2 V to V
CC
+ 0.3 V
−0.3 V to +6.5 V
0°C to 85°C
0°C to 150°C
−65°C to +150°C
123°C/W
90°C/W
300°C
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all voltages are
referenced to PGND.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 6 | Page 4 of 13 | www.onsemi.com
ADP3418
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BST
1
IN
2
8
DRVH
03229-B-002
SW
TOP VIEW
OD
3
(Not to Scale)
6
PGND
VCC
4
5
DRVL
7
AD3418
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
Mnemonic
BST
IN
OD
VCC
DRVL
PGND
SW
DRVH
Description
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between the BST and SW pins holds this
bootstrapped voltage for the high-side MOSFET as it is switched. The capacitor should be between 100 nF and 1 µF.
Logic Level Input. This pin has primary control of the drive outputs.
Output Disable. When low, this pin disables normal operation, forcing DRVH and DRVL low.
Input Supply. This pin should be bypassed to PGND with a ~1 µF ceramic capacitor.
Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.
Power Ground. Should be closely connected to the source of the lower MOSFET.
This pin is connected to the buck switching node, close to the upper MOSFET’s source. It is the floating return
for the upper MOSFET drive signal.
Buck Drive. Output drive for the upper (buck) MOSFET.
Rev. 6 | Page 5 of 13 | www.onsemi.com
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