CAT28C16AG-12T datasheet, PDF - EEWORLD Datasheet

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CAT28C16AG-12T: Description16K-Bit CMOS PARALLEL E2PROM; Categorystorage storage; File Size124KB，10 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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CAT28C16AG-12T Overview

16K-Bit CMOS PARALLEL E2PROM

CAT28C16AG-12T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ON Semiconductor
Parts packaging code	QFJ
package instruction	PLCC-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	120 ns
command user interface	NO
Data polling	YES
Data retention time - minimum	100
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PQCC-J32
length	13.97 mm
memory density	16384 bit
Memory IC Type	EEPROM
memory width	8
Number of functions	1
Number of terminals	32
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Programming voltage	5 V
Certification status	Not Qualified
Maximum seat height	3.18 mm
Maximum standby current	0.0001 A
Maximum slew rate	0.035 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.43 mm
Maximum write cycle time (tWC)	5 ms
Base Number Matches	1

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CAT28C16A

16 kb CMOS Parallel

EEPROM

Description

The CAT28C16A is a fast, low power, 5V−only CMOS Parallel

EEPROM organized as 2K x 8−bits. It requires a simple interface for

in−system programming. On−chip address and data latches,

self−timed write cycle with auto−clear and V

power up/down write

protection eliminate additional timing and protection hardware. DATA

Polling signals the start and end of the self−timed write cycle.

Additionally, the CAT28C16A features hardware write protection.

The CAT28C16A is manufactured using ON Semiconductor’s

advanced CMOS floating gate technology. It is designed to endure

100,000 program/erase cycles and has a data retention of 100 years.

The device is available in JEDEC approved 24−pin DIP and SOIC or

32−pin PLCC packages.

Features

http://onsemi.com

SOIC−24

J, K, W, X SUFFIX

CASE 751BK

•

Fast Read Access Times: 90 ns, 120 ns, 200 ns

•

Low Power CMOS Dissipation:

•

– Active: 25 mA Max.

– Standby: 100

Max.

Simple Write Operation:

– On−chip Address and Data Latches

– Self−timed Write Cycle with Auto−clear

Fast Write Cycle Time: 10 ms Max

End of Write Detection: DATA Polling

Hardware Write Protection

CMOS and TTL Compatible I/O

100,000 Program/Erase Cycles

100 Year Data Retention

Commercial, Industrial and Automotive Temperature Ranges

PIN CONFIGURATION

PDIP−24

L SUFFIX

CASE 646AD

PLCC−32

N, G SUFFIX

CASE 776AK

PIN FUNCTION

Pin Name

−A

I/O

−I/O

Function

Address Inputs

Data Inputs/Outputs

Chip Enable

Output Enable

Write Enable

5 V Supply

Ground

No Connect

DIP Package (L)

SOIC Package (J, K, W, X)

I/O

PLCC Package (N, G)

ORDERING INFORMATION

I/O

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

4 3 2 1 32 31 30

TOP VIEW

14 15 16 17 18 19 20

I/O

Semiconductor Components Industries, LLC, 2009

October, 2009

−

Rev. 6

Publication Order Number:

CAT28C16A/D

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