a
120 mA Switched Capacitor
Voltage Inverter with Regulated Output
ADP3605
FUNCTIONAL BLOCK DIAGRAM
C
P
+
S PD
S1
C
P
–
DN S
S3
B
S ND
S2
DNS
S4
V
OUT
V
IN
FEATURES
Fully Regulated Output Voltage (–3 V and Adjustable)
High Output Current: 120 mA
Output Accuracy: 3%
250 kHz Switching Frequency
Low Shutdown Current: 2 A Typical
Input Voltage Range from 3 V to 6 V
SO-8 and RU-14 Packages
–40 C to +85 C Ambient Temperature Range
APPLICATIONS
Voltage Inverters
Voltage Regulators
Computer Peripherals and Add-On Cards
Portable Instruments
Battery Powered Devices
Pagers and Radio Control Receivers
Disk Drives
Mobile Phones
ADP3605
SD
OSC
CLOCK
GEN
FEEDBACK
CONTROL
LOOP
V
SENSE
GND
GENERAL DESCRIPTION
The ADP3605 is a 120 mA regulated output switched capacitor
voltage inverter. It provides a regulated output voltage with
minimum voltage loss and requires a minimum number of ex-
ternal components. In addition, the ADP3605 does not require
the use of an inductor.
Pin-for-pin and functionally compatible with the ADP3604, the
internal oscillator of the ADP3605 runs at 500 kHz nominal
frequency which produces an output switching frequency of
250 kHz. This allows for the use of smaller charge pump and
filter capacitors.
The ADP3605 provides an accuracy of
±
3% with a typical shut-
down current of 2
µA.
It can also operate from a single positive
input voltage as low as 3 V. The ADP3605 is offered with the
regulation fixed at –3 V or adjustable via external resistors over
a –3 V to –6 V range.
V
IN
*C
IN
4.7 F
+
*C
P
4.7 F
+
V
IN
C
P
+
V
OUT
+
–3.0V
*C
O
4.7 F
ADP3605-3
C
P
–
OFF
SD
ON
0
GND
V
SENSE
*FOR BEST PERFORMANCE, 10 F IS RECOMMENDED
C
P
: SPRAGUE, 293D475X0010B2W
C
IN
, C
O
: TOKIN, 1E475ZY5UC205F
Figure 1. Typical Application Circuit
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
ADP3605–SPECIFICATIONS
1, 2, 3
(V
Parameter
OPERATING SUPPLY RANGE
SUPPLY CURRENT
Shutdown Mode
OUTPUT VOLTAGE
4
Symbol
V
S
I
S
IN
= 5.0 V @ T
A
= +25 C, C
P
= C
O
= 4.7 F unless otherwise noted)
Min
3
Typ
5
3
2
–3.09
–3.15
–3.0
–3
Max
6
6
15
–2.91
–2.85
Units
V
mA
µA
V
V
Conditions
–40°C < T
A
< +85°C
V
SD
= V
IN
–40°C < T
A
< +85°C
I
O
= 60 mA
I
O
= 10 mA–120 mA,
–40°C
≤
T
A
≤
+85°C
4.75 V
≤
V
S
≤
6.0 V
I
O
= 10 mA–60 mA
I
O
= 10 mA–120 mA
V
O
LOAD REGULATION
OUTPUT RESISTANCE
Open Loop
OUTPUT RIPPLE VOLTAGE
∆V
O
/I
O
0.3
0.25
9
mV/mA
mV/mA
Ω
mV
mV
288
kHz
R
O
V
RIPPLE
C
IN
= C
O
= 4.7
µF,
I
LOAD
= 60 mA
I
LOAD
= 120 mA
V
IN
= 5 V
–40°C < T
A
< +85°C
212
38
75
250
SWITCHING FREQUENCY
SHUTDOWN
Logic Input High
Input Current
Logic Input Low
Input Current
F
S
V
IH
I
IH
V
IL
I
IL
2.4
1
0.4
1
V
µA
V
µA
NOTES
1
Capacitors C
IN,
C
O
and C
P
in the test circuit are 4.7
µF
with 0.1
Ω
ESR.
2
See Figure 1 Conditions.
3
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
4
For the adjustable device, a 1% resistor should be used to maintain output voltage tolerance. For both device types, tolerances can be improved by >1% using larger
value and lower ESR capacitors for C
O
and C
P
.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25°C unless otherwise noted)
Input Voltage (V+ to GND, GND to OUT) . . . . . . . . +7.5 V
Input Voltage (V+ to OUT) . . . . . . . . . . . . . . . . . . . . . +11 V
Output Short Circuit Protection . . . . . . . . . . . . . . . . . . . 1 sec
Power Dissipation, SO-8 . . . . . . . . . . . . . . . . . . . . . . 660 mW
θ
JA2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
150°C/W
Power Dissipation, RU-14 . . . . . . . . . . . . . . . . . . . . . 600 mW
θ
JA2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
165°C/W
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
2
θ
JA
is specified for worst case conditions with device soldered on a circuit board.
ORDERING GUIDE
Model
ADP3605AR-3
ADP3605AR
ADP3605ARU-3
Output Voltage
–3 V
ADJ
–3 V
Package Description
Small Outline
Small Outline
Thin Shrink Small Outline Package (TSSOP)
Package Options*
SO-8
SO-8
RU-14
*Contact the factory for the availability of other output voltage options.
–2–
REV. A
ADP3605
Table I. Other Members of ADP36xx Family
1
PIN FUNCTION DESCRIPTIONS
Model
Output Package
Current Option
2
Comments
ADP3603AR 50 mA
ADP3604AR 120 mA
ADP3610ARU 320 mA
SO-8
Nom.–3
±
3% Inverter
SO-8
Nom.–3
±
3% Inverter
TSSOP-16 Nom. 3.3 V
IN
Doubler
Pin
Pin
SO-8 TSSOP Name
1
2
3
4
4
5
6
7
C
P
+
GND
C
P
–
SD
Function
Positive Terminal for the Pump
Capacitor.
Device Ground.
Negative Terminal for the Pump
Capacitor.
Logic Level Shutdown Pin. Apply a
logic high or connect to V
IN
to shut-
down the device. In shutdown mode,
the charge pump is turned off and
quiescent current is reduced to 2
µA
(typical). Apply a logic low or con-
nect to ground for normal operation.
Output Voltage Sense Line. This is
used to improve load regulation by
eliminating IR drop on the high
current carrying output traces. For
normal operation, connect V
SENSE
to
V
OUT
. See Application section for
more detail.
NOTES
1
See individual data sheets for detailed ordering information.
2
SO = Small Outline; TSSOP = Thin Shrink Small Outline Package.
Table II. Alternative Capacitor Technologies
Type
Aluminum
Electrolytic
Capacitor
Multilayer
Ceramic
Capacitor
Solid
Tantalum
Capacitor
OS-CON
Capacitor
Life
High
Freq
Temp
Size
Cost
Fair
Fair
Fair
Small
Low
5
8
V
SENSE
Long
Above
Avg
Above
Avg
Good
Poor
Fair
1
High
Avg
Good
Avg
Good
Avg
Good
Avg
Avg
6
NOTE
1
Refer to capacitor manufacturer's data sheet for operation below 0°C.
7
1, 2, 3,
9, 12,
13, 14
10
NC
V
OUT
Table III. Recommended Capacitor Manufacturers
Manufacturer
Sprague
Sprague
Nichicon
Mallory
TOKIN
MuRata
Capacitor
672D, 673D,
674D, 678D
675D, 173D,
199D
PF and PL
TDC and TDL
MLCC
GRM
Capacitor Type
Aluminum Electrolytic
Tantalum
Aluminum Electrolytic
Tantalum
Multilayer Ceramic
Multilayer Ceramic
8
11
V
IN
No Connection.
Regulated Negative Output Voltage.
Connect a low ESR, 4.7
µF
or larger
capacitor between this pin and de-
vice GND.
Positive Supply Input Voltage. Con-
nect a low ESR bypass capacitor
between this pin and device ground
to minimize supply transients.
PIN CONFIGURATIONS
RU-14
NC
NC
NC
C
P
+
GND
C
P
–
SD
NC
NC
NC
V
IN
V
OUT
NC
V
SENSE
C
P
+
1
GND
2
SO-8
8
V
IN
ADP3605
7
V
OUT
TOP VIEW
C
P
–
3
(Not to Scale)
6
NC
ADP3605
SD
4
5
V
SENSE
NC = NO CONNECT
NC = NO CONNECT
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3605 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges larger than 600 V HBM.
Therefore, proper ESD precautions are recommended to avoid performance degradation or loss
of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–
ADP3605 –Typical Performance Characteristics
270
OSCILLATOR FREQUENCY – kHz
4.5
V
IN
= +5V
4
2.5
–2.97
OUTPUT VOLTAGE – Volts
I
L
= 120mA
3
–2.96
SUPPLY CURRENT – mA
IN NORMAL MODE
SUPPLY CURRENT – A
IN SHUTDOWN MODE
3.5
SHUTDOWN MODE
(V
SD
= V
IN
)
2
–2.98
–2.99
I
L
= 60mA
–3.00
–3.01
–3.02
–3.03
–40
I
L
= 10mA
260
3
NORMAL MODE
(V
SD
= 0V)
2.5
2
1.5
–40
1.5
1
0.5
0
85
250
3
3.5
4
4.5
5
5.5
SUPPLY VOLTAGE – Volts
6
–15
10
35
60
TEMPERATURE – C
–15
10
35
60
TEMPERATURE – C
85
Figure 2. Oscillator Frequency vs.
Supply Voltage
Figure 3. Supply Current vs.
Temperature
Figure 4. Output Voltage vs.
Temperature
300
OSCILLATOR FREQUENCY – kHz
140
120
–2.5
V
IN
= +3V
–2.6
OUTPUT VOLTAGE – Volts
280
V
IN
= +3.5V
V
IN
= +4.75V
INPUT CURRENT – mA
100
80
60
40
20
–2.7
–2.8
V
IN
= +5V
–2.9
–3.0
–3.1
–3.2
V
IN
= +6V
260
240
220
200
–40
–15
10
35
60
TEMPERATURE – C
85
0
10
30
50
70
90
110
LOAD CURRENT – mA
130
0
40
80 120 160 200
LOAD CURRENT – mA
240
280
Figure 5. Oscillator Frequency vs.
Temperature
Figure 6. Average Input Current
vs. Output Current
Figure 7. Output Voltage vs. Load
Current
3.5
3
NORMAL MODE
(V
SD
= 0V)
7
6
5
4
3
SHUTDOWN MODE
(V
SD
= V
IN
)
2
1
0
SUPPLY CURRENT – mA
IN NORMAL MODE
2.5
2
1.5
1
0.5
0
3
5
4
SUPPLY VOLTAGE – Volts
6
SUPPLY CURRENT – A
IN SHUTDOWN MODE
Figure 8. Supply Current vs. Supply
Voltage
Figure 9 . Start-Up Under Full Load
Figure 10. Enable/Disable Time
Under Full Load
–4–
REV. A
ADP3605
THEORY OF OPERATION
The ADP3605 uses a switched capacitor principle to generate a
negative voltage from a positive input voltage. An onboard
oscillator generates a two phase clock to control a switching
network that transfers charge between the storage capacitors.
The switches turn on and off at a 250 kHz rate, which is gener-
ated from an internal 500 kHz oscillator. The basic principle
behind the voltage inversion scheme is illustrated in Figures 11
and 12.
V
IN
S1
C
P
S2
+
–
S4
C
O
V
OUT
S3
Temperature is another factor affecting capacitor performance.
Figure 13 illustrates the temperature effect on various capaci-
tors. If the circuit has to operate at temperatures significantly
different from 25°C, the capacitance and ESR values must be
carefully selected to adequately compensate for the change.
Various capacitor technologies offer improved performance over
temperature; for example, certain tantalum capacitors provide
good low-temperature ESR but at a higher cost. Table II pro-
vides the ratings for different types of capacitor technologies to
help the designer select the right capacitors for the applica-
tion. The exact values of C
IN
and C
O
are not critical. How-
ever, low ESR capacitors such as solid tantalum and multilayer
ceramic capacitors are recommended to minimize voltage loss at
high currents. Table III shows a partial list of the recommended
low ESR capacitor manufacturers.
Input Capacitor
Figure 11. ADP3605 Switch Configuration Charging the
Pump Capacitor
During phase one, S1 and S2 are ON, charging the pump ca-
pacitor to the input voltage. Before the next phase begins, S1
and S2 are turned OFF as well as S3 and S4 to prevent any
overlap. S3 and S4 are turned ON during the second phase (see
Figure 12) and charge stored in the pump capacitor is trans-
ferred to the output capacitor.
V
IN
S1
C
P
S2
+
–
S4
C
O
V
OUT
S3
A small 1
µF
input bypass capacitor, preferably with low ESR,
such as tantalum or multilayer ceramic, is recommended to
reduce noise and supply transients and supply part of the peak
input current drawn by the ADP3605. A large capacitor is rec-
ommended if the input supply is connected to the ADP3605
through long leads, or if the pulse current drawn by the device
might affect other circuitry through supply coupling.
Output Capacitor
Figure 12. ADP3605 Switch Configuration Charging the
Output Capacitor
During the second phase, the positive terminal of the pump
capacitor is connected to ground through variable resistance
switch, S3, and the negative terminal is connected to the out-
put, resulting in a voltage inversion at the output terminal.
The ADP3605 block diagram is shown on the front page.
APPLICATION INFORMATION
Capacitor Selection
The output capacitor (C
O
) is alternately charged to the C
P
volt-
age when C
P
is switched in parallel with C
O
. The ESR of C
O
introduces steps in the V
OUT
waveform whenever the charge
pump charges C
O
, which contributes to V
OUT
ripple. Thus,
ceramic or tantalum capacitors are recommended for C
O
to
minimize ripple on the output. Figure 14 illustrates the output
ripple voltage effect for various capacitance and ESR values.
Note that as the capacitor value increases beyond the point
where the dominant contribution to the output ripple is due to
the ESR, no significant reduction in V
OUT
ripple is achieved by
added capacitance. Since output current is supplied solely by
the output capacitor, C
O
, during one-half of the charge-pump
cycle, peak-to-peak output ripple voltage is calculated by using
the following formula.
V
RIPPLE
=
I
L
2
×
F
S
×
C
O
+
2
×
I
L
×
ESR
CO
The ADP3605’s high internal oscillator frequency permits the
use of small capacitors for both the pump and the output ca-
pacitors. For a given load current, factors affecting the output
voltage performance are:
• Pump (C
P
) and output (C
O
) capacitance.
• ESR of the C
P
and C
O
.
When selecting the capacitors, keep in mind that not all manu-
facturers guarantee capacitor ESR in the range required by the
circuit. In general, the capacitor’s ESR is inversely proportional
to its physical size, so larger capacitance values and higher volt-
age ratings tend to reduce ESR. Since the ESR is also a function
of the operating frequency, when selecting a capacitor, make
sure its value is rated at the circuit's operating frequency.
where:
I
L
= Load Current
F
S
= 250 kHz nominal switching frequency
C
O
= 10
µF
with an ESR of 0.15
Ω
V
RIPPLE
=
120
mA
2
×
250
kHz
×
10
µ
F
+
2
×
120
mA
×
0.15
=
60
mV
Multiple smaller capacitors can be connected in parallel to yield
lower ESR and lower cost. For lighter loads, proportionally
smaller capacitors are required. To reduce high frequency
noise, bypass the output with a 0.1
µF
ceramic capacitor in
parallel with the output capacitor.
REV. A
–5–
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