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CAT28LV65WI-15

Description
EEPROM, 8KX8, 150ns, Parallel, CMOS, PDSO28, LEAD AND HALOGEN FREE, SOIC-28
Categorystorage    storage   
File Size154KB,15 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT28LV65WI-15 Overview

EEPROM, 8KX8, 150ns, Parallel, CMOS, PDSO28, LEAD AND HALOGEN FREE, SOIC-28

CAT28LV65WI-15 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP, SOP28,.4
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time150 ns
command user interfaceNO
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDSO-G28
JESD-609 codee3
length17.9 mm
memory density65536 bit
Memory IC TypeEEPROM
memory width8
Humidity sensitivity level1
Number of functions1
Number of terminals28
word count8192 words
character code8000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize8KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP28,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
page size32 words
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Programming voltage3 V
Certification statusNot Qualified
ready/busyYES
Maximum seat height2.65 mm
Maximum standby current0.0001 A
Maximum slew rate0.008 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
switch bitYES
width7.5 mm
Maximum write cycle time (tWC)5 ms
CAT28LV65
64 kb CMOS Parallel
EEPROM
Description
The CAT28LV65 is a low voltage, low power, CMOS Parallel
EEPROM organized as 8K x 8−bits. It requires a simple interface for
in−system programming. On−chip address and data latches,
self−timed write cycle with auto−clear and V
CC
power up/down write
protection eliminate additional timing and protection hardware. DATA
Polling, RDY/BUSY and Toggle status bit signal the start and end of
the self−timed write cycle. Additionally, the CAT28LV65 features
hardware and software write protection.
The CAT28LV65 is manufactured using ON Semiconductor’s
advanced CMOS floating gate technology. It is designed to endure
100,000 program/erase cycles and has a data retention of 100 years.
The device is available in JEDEC approved 28−pin DIP, 28−pin TSOP,
28−pin SOIC or 32−pin PLCC packages.
Features
http://onsemi.com
PDIP−28
P, L SUFFIX
CASE 646AE
SOIC−28
J, K, W, X SUFFIX
CASE 751BM
3.0 V to 3.6 V Supply
Read Access Times:
– 150/200/250 ns
Low Power CMOS Dissipation:
– Active: 8 mA Max.
– Standby: 100
mA
Max.
Simple Write Operation:
– On−chip Address and Data Latches
– Self−timed Write Cycle with Auto−clear
Fast Write Cycle Time:
– 5 ms Max.
Commercial, Industrial and Automotive Temperature Ranges
CMOS and TTL Compatible I/O
Automatic Page Write Operation:
– 1 to 32 bytes in 5 ms
– Page Load Timer
End of Write Detection:
– Toggle Bit
– DATA Polling
– RDY/BUSY
Hardware and Software Write Protection
100,000 Program/Erase Cycles
100 Year Data Retention
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
PLCC−32
N, G SUFFIX
CASE 776AK
TSOP−28
H13 SUFFIX
CASE 318AE
PIN FUNCTION
Pin Name
A
0
−A
12
I/O
0
−I/O
7
CE
OE
RDY/BSY
WE
V
CC
V
SS
NC
Function
Address Inputs
Data Inputs/Outputs
Chip Enable
Output Enable
Ready/BUSY Status
Write Enable
3.0 V to 3.6 V Supply
Ground
No Connect
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
©
Semiconductor Components Industries, LLC, 2009
October, 2009
Rev. 7
1
Publication Order Number:
CAT28LV65/D
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