EEWORLDEEWORLDEEWORLD

Part Number

Search

FIN1048MTC

Description
3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver, TSSOP 16L, 9400-RAIL
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size253KB,6 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance  
Download Datasheet Parametric View All

FIN1048MTC Online Shopping

Suppliers Part Number Price MOQ In stock  
FIN1048MTC - - View Buy Now

FIN1048MTC Overview

3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver, TSSOP 16L, 9400-RAIL

FIN1048MTC Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
Manufacturer packaging codeMTC16
Reach Compliance Codecompliant
Factory Lead Time1 week
FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver
September 2001
Revised August 2003
FIN1048
3.3V LVDS 4-Bit Flow-Through
High Speed Differential Receiver
General Description
This quad receiver is designed for high speed interconnect
utilizing Low Voltage Differential Signaling (LVDS) technol-
ogy. The receiver translates LVDS levels, with a typical dif-
ferential input threshold of 100mV, to LVTTL signal levels.
LVDS provides low EMI at ultra low power dissipation even
at high frequencies. This device is ideal for high speed
transfer of clock and data.
The FIN1048 can be paired with its companion driver, the
FIN1047, or any other LVDS driver.
Features
s
Greater than 400Mbs data rate
s
Flow-through pinout simplifies PCB layout
s
3.3V power supply operation
s
0.4ns maximum differential pulse skew
s
2.5ns maximum propagation delay
s
Low power dissipation
s
Power-Off protection
s
Fail safe protection for open-circuit, shorted and termi-
nated conditions
s
Meets or exceeds the TIA/EIA-644 LVDS standard
s
Pin compatible with equivalent RS-422 and LVPECL
devices
s
16-Lead SOIC and TSSOP packages save space
Ordering Code:
Order Number
FIN1048M
FIN1048MTC
Package Number
M16A
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Name
R
IN1+
, R
IN2+
, R
IN3+
, R
IN4+
R
IN1−
, R
IN2−
, R
IN3−
, R
IN4−
EN
EN
V
CC
GND
Description
Non-Inverting LVDS Inputs
Inverting LVDS Inputs
Driver Enable Pin
Inverting Driver Enable Pin
Power Supply
Ground
R
OUT1
, R
OUT2
, R
OUT3
, R
OUT4
LVTTL Data Outputs
Function Table
Inputs
EN
H
H
H
X
L or Open
H
=
HIGH Logic Level
Z
=
High Impedance
Outputs
R
IN+
H
L
X
X
R
OUT−
L
H
X
X
R
OUT
H
L
H
Z
Z
EN
L or Open
L or Open
H
X
L or Open Fail Safe Condition
L
=
LOW Logic Level
X
=
Don’t Care
Fail Safe
=
Open, Shorted, Terminated
© 2003 Fairchild Semiconductor Corporation
DS500588
www.fairchildsemi.com
I'm begging for English, Russian, French, German, Arabic, and Japanese fonts!!!
[i=s]This post was last edited by jameswangsynnex on 2015-3-3 19:59[/i]...
yidianyisi Mobile and portable
EEWORLD University Hall--Analysis of rules and techniques for high-speed PCB design
High-speed PCB design rules and techniques analysis : https://training.eeworld.com.cn/course/6004[Course Background]:What are rules? How much should be controlled between various devices? How much sho...
F凡亿教育 Embedded System
Network speed under WINCE system
Dear heroes: Assuming the development platform is PXA270+WINCE5.0, what is the actual transmission speed of a 100M network on a similar embedded platform? How to test it? Are there any test tools? Jus...
AVR_AFA Embedded System
Kudos to the moderator open82977352!
The National Undergraduate Electronic Design Competition has passed, and the competition section has naturally become "a lot more deserted", but the moderator open82977352 is still sticking to his pos...
小娜 Talking
A Difficulty in EDA Course Design
My class assignment is an electric sliding door, in which 59 pulses are needed to open the door, the first three pulses are spaced at 100ms, 60ms, and 30ms, then 51 pulses are spaced at 20ms, and the ...
谷溪玄牝 FPGA/CPLD
Lock the power management of win98
As we all know, Win95 has the function of setting passwords, but I wonder if you have noticed that when returning to Win95 from the "suspend" state, the system does not require us to enter a password....
birdpaladin Power technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2572  2557  2814  991  262  52  57  20  6  19 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号