Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
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The following revision history table summarizes changes contained in this document.
Revision
Number
1.00
1.01
Revision
Date
07/14/2005
09/04/2007
Initial public release.
Description of Changes
Added a footnote to RTI of Table 3.2; Added RTI description to Section 3.5.6;
Added a sentence "If active BDM mode is enabled in stop3, the internal RTI
clock is not available." to the Section 5.7 Real Time Interrupt.
Changed the Maximun Low Power of FBE and FEE in
Table A-9
to 10 MHz.
Changed the Title of
Table 13-2
from “IIC1A Register Field Descriptions” to
“IIC1F Register Field Descriptions”
Added 42-pin SDIP information.
Changed “However, when HGO=0, the maximum frequency is 8 MHz in FEE
and FBE modes.” to “However, when HGO=0, the maximum frequency is
10 MHz in FEE and FBE modes.” in Appendix B5.
Updated the “How to reach us” at backpage.
1.02
02/25/2008
2
7/30/2008
This product incorporates SuperFlash
®
technology licensed from SST.
Freescale‚ and the Freescale logo are trademarks of Freescale Semiconductor, Inc.
©
Freescale Semiconductor, Inc., 2005-2008. All rights reserved.
MC9S08GB60A Data Sheet, Rev. 2
6
Freescale Semiconductor
List of Chapters
Chapter Number
Title
Page
Chapter 1 Device Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Chapter 2 Pins and Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Chapter 3 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Chapter 4 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Chapter 5 Resets, Interrupts, and System Configuration . . . . . . . . . . . . . . . 65
Chapter 6 Parallel Input/Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Chapter 7 Internal Clock Generator (S08ICGV2) . . . . . . . . . . . . . . . . . . . . . 103
Chapter 8 Central Processor Unit (S08CPUV2) . . . . . . . . . . . . . . . . . . . . . . 129
Chapter 9 Keyboard Interrupt (S08KBIV1) . . . . . . . . . . . . . . . . . . . . . . . . . . 149
Chapter 10 Timer/PWM (S08TPMV1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Chapter 11 Serial Communications Interface (S08SCIV1) . . . . . . . . . . . . . . 171
Chapter 12 Serial Peripheral Interface (S08SPIV3). . . . . . . . . . . . . . . . . . . . 189
Chapter 13 Inter-Integrated Circuit (S08IICV1) . . . . . . . . . . . . . . . . . . . . . . . 205
Chapter 14 Analog-to-Digital Converter (S08ATDV3) . . . . . . . . . . . . . . . . . 223
Chapter 15 Development Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 239
Appendix A Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Appendix B EB652: Migrating from the GB60 Series to the
GB60A Series . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
Appendix C Ordering Information and Mechanical Drawings . . . . . . . . . . 287
MC9S08GB60A Data Sheet, Rev. 2
Freescale Semiconductor
3
Embedded System
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