ST72561
8-bit MCU with Flash or ROM,
10-bit ADC, 5 timers, SPI, LINSCI
™
, active CAN
Features
■
■
■
■
■
Memories
– 16K to 60K High Density Flash (HDFlash) or
ROM with read-out protection capability. In-
Application Programming and In-Circuit Pro-
gramming for HDFlash devices
– 1 to 2K RAM
– HDFlash endurance: 100 cycles, data reten-
tion 40 years at 85°C
Clock, Reset and Supply Management
– Low power crystal/ceramic resonator oscilla-
tors and bypass for external clock
– PLL for 2x frequency multiplication
– 5 power saving modes: Halt, Auto Wake Up
From Halt, Active Halt, Wait and Slow
Interrupt Management
– Nested interrupt controller
– 14 interrupt vectors plus TRAP and RESET
– TLI top level interrupt (on 64-pin devices)
– Up to 21 external interrupt lines (on 4 vectors)
Up to 48 I/O Ports
– Up to 48 multifunctional bidirectional I/O lines
– Up to 36 alternate function lines
– Up to 6 high sink outputs
5 Timers
– 16-bit timer with 2 input captures, 2 output
compares, external clock input, PWM and
pulse generator modes
– 8-bit timer with 1 or 2 input captures, 1 or 2
output compares, PWM and pulse generator
modes
– 8-bit PWM auto-reload timer with 1 or 2 input
captures, 2 or 4 independent PWM output
channels, output compare and time base in-
terrupt, external clock with event detector
LQFP32
7x7mm
LQFP64
14x14mm
LQFP44
10x10mm
LQFP64
10x10mm
■
■
■
■
– Main clock controller with real-time base and
clock output
– Window watchdog timer
Up to 4 Communications Interfaces
– SPI synchronous serial interface
– Master/slave LINSCI™ asynchronous serial
interface
– Master-only LINSCI™ asynchronous serial in-
terface
– CAN 2.0B active
Analog Peripheral (Low Current Coupling)
– 10-bit A/D converter with up to 16 inputs
– Up to 9 robust ports (low current coupling)
Instruction Set
– 8-bit data manipulation
– 63 basic instructions
– 17 main addressing modes
– 8 x 8 unsigned multiply instruction
Development Tools
– Full hardware/software development package
Table 1. Device Summary
Features
Program memory - bytes
RAM (stack) - bytes
Operating Supply
CPU Frequency
Max. Temp. Range
Packages
ST72561AR9/ST72561R9/
ST72561J9/ST72561K9
60K
2K (256)
ST72561AR7
48K
2K (256)
ST72561AR6/ST72561R6/ ST72561AR4/ST72561J4/
ST72561J6/ST72561K6
ST72561K4
32K
1.5K (256)
16K
1K (256)
4.5V to 5.5 V
External Resonator Osc. w/ PLLx2/8 MHz
-40°C to +125°C
LQFP64 10x10mm (AR), LQFP64 14x14mm (R) LQFP44 10x10mm (J), LQFP32 7x7mm (K)
Rev. 7
October 2008
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1
Table of Contents
1 DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 REGISTER AND MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 FLASH PROGRAM MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3 STRUCTURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.4 ICC INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.5 ICP (IN-CIRCUIT PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.6 IAP (IN-APPLICATION PROGRAMMING) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.7 RELATED DOCUMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.8 REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.2 MAIN FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.3 CPU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6 SUPPLY, RESET AND CLOCK MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.1 PHASE LOCKED LOOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.2 MULTI-OSCILLATOR (MO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.3 RESET SEQUENCE MANAGER (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.4 SYSTEM INTEGRITY MANAGEMENT (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2 MASKING AND PROCESSING FLOW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.3 INTERRUPTS AND LOW POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.4 CONCURRENT & NESTED MANAGEMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
7.5 INTERRUPT REGISTER DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7.6 EXTERNAL INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8 POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.2 SLOW MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.3 WAIT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.4 HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
8.5 ACTIVE HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.6 AUTO WAKE-UP FROM HALT MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
9 I/O PORTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.2 FUNCTIONAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.3 I/O PORT IMPLEMENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.4 LOW POWER MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
265
9.5 INTERRUPTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
9.6 I/O PORT REGISTER CONFIGURATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
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Table of Contents
10 ON-CHIP PERIPHERALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
10.1 WINDOW WATCHDOG (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
10.2 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK MCC/RTC . . . . . . . . . . . . . . . 59
10.3 PWM AUTO-RELOAD TIMER (ART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
10.4 16-BIT TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
10.5 8-BIT TIMER (TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
10.6 SERIAL PERIPHERAL INTERFACE (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
10.7 LINSCI SERIAL COMMUNICATION INTERFACE (LIN MASTER/SLAVE) . . . . . . . . . . . 121
10.8 LINSCI SERIAL COMMUNICATION INTERFACE (LIN MASTER ONLY) . . . . . . . . . . . . 152
10.9 BECAN CONTROLLER (BECAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
10.1010-BIT A/D CONVERTER (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 208
11 INSTRUCTION SET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
11.1 CPU ADDRESSING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212
11.2 INSTRUCTION GROUPS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
12 ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
12.1 PARAMETER CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218
12.2 ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
12.3 OPERATING CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
12.4 SUPPLY CURRENT CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
12.5 CLOCK AND TIMING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225
12.6 AUTO WAKEUP FROM HALT OSCILLATOR (AWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . 228
12.7 MEMORY CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
12.8 EMC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230
12.9 I/O PORT PIN CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233
12.10CONTROL PIN CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 238
12.11TIMER PERIPHERAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 241
12.12COMMUNICATION INTERFACE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . 242
12.1310-BIT ADC CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244
13 PACKAGE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
13.1 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248
13.2 THERMAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
13.3 SOLDERING AND GLUEABILITY INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
14 DEVICE CONFIGURATION AND ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . 251
14.1 FLASH OPTION BYTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 251
14.2 TRANSFER OF CUSTOMER CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
15 DEVELOPMENT TOOLS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256
16 IMPORTANT NOTES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
16.1 ALL DEVICES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
16.2 FLASH/FASTROM DEVICES ONLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260
16.3 ROM DEVICES ONLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262
17 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
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ST72561
1 DESCRIPTION
The ST72561 devices are members of the ST7 mi-
crocontroller family designed for mid-range appli-
cations with CAN (Controller Area Network) and
LIN (Local Interconnect Network) interface.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with Flash or ROM pro-
gram memory. The ST7 family architecture offers
both power and flexibility to software developers,
enabling the design of highly efficient and compact
application code.
Figure 1. Device Block Diagram
option
The on-chip peripherals include an A/D converter,
a PWM Autoreload timer, 2 general purpose tim-
ers, 2 asynchronous serial interfaces, and an SPI
interface.
For power economy, microcontroller can switch
dynamically into WAIT, SLOW, Active-Halt, Auto
Wake-up from HALT (AWU) or HALT mode when
the application is in idle or stand-by state.
Typical applications are consumer, home, office
and industrial products.
OSC1
OSC2
PLL x 2
OSC
PWM
ART
8-Bit
TIMER
16-Bit
TIMER
/2
V
DD
V
SS
POWER
SUPPLY
PORT A
PORT B
PORT C
PORT D
PORT E
PORT F
SPI
LINSCI2
(LIN master)
LINSCI1
(LIN master/slave)
WINDOW
ADDRESS AND DATA BUS
RESET
TLI
1
CONTROL
8-BIT CORE
ALU
PA7:0
(8 bits)
1
PB7:0
(8 bits)
1
PC7:0
(8 bits)
1
PD7:0
(8 bits)
1
PE7:0
(8 bits)
1
PF7:0
(8 bits)
1
PROGRAM
MEMORY
(16 - 60 Kbytes)
RAM
(1 - 2 Kbytes)
MCC
(Clock Control)
WATCHDOG
CAN
(2.0B ACTIVE)
1
On
some devices only (see Device Summary on page 1)
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3
ST72561
2 PIN DESCRIPTION
Figure 2. LQFP 64-Pin Package Pinout
OSC1
OSC2
ARTIC1 / PA0
PWM0 / PA1
PWM1 / (HS) PA2
PWM2 / PA3
PWM3 / PA4
V
SS_3
V
DD_3
ARTCLK / (HS) PA5
ARTIC2 / (HS) PA6
T8_OCMP2 / PA7
T8_ICAP2 / PB0
T8_OCMP1 / PB1
T8_ICAP1 / PB2
MCO / PB3
64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
PF7
PF6
PD7 / AIN11
PD6 / AIN10
RESET
PD5 /
LIN
SCI2_TDO
V
DD_0
V
DDA
V
SS_0
V
SSA
PD4 /
LIN
SCI2_RDI
PD3 (HS)/
LIN
SCI2_SCK
PF5
TLI
PF4
PF3 / AIN9
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
ei3
ei3
ei3 47
46
45
44
ei0
43
ei3 42
41
40
39
ei0
38
37
36
35
ei1
34
ei1
ei2
ei1
33
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PD2 /
LIN
SCI1_TDO
PD1 /
LIN
SCI1_RDI
PF2 / AIN8
PF1 / AIN7
PF0
PE7
PD0 / SPI_SS / AIN6
V
DD
_1
V
SS
_1
PC7 / SPI_SCK
PC6 / SPI_MOSI
PC5 / SPI_MISO
PE6 / AIN5
PE5
PC4 / CAN_TX
PC3 / CAN_RX
AIN12 / PE0
AIN13 / PE1
ICCCLK / AIN0 / PB4
AIN14 / PE2
AIN15 / PE3
ICCDATA / AIN1 / PB5
(*)T16_OCMP1 / AIN2 / PB6
V
SS_2
V
DD_2
(*)T16_OCMP2 / AIN3 / PB7
(*)T16_ICAP1 / AIN4 / PC0
(*)T16_ICAP2 / (HS) PC1
T16_EXTCLK / (HS) PC2
PE4
NC
ICCSEL/V
PP
(HS) 20mA high sink capability
eix
associated external interrupt vector
(*) : by option bit:
T16_ICAP1 can be moved to PD4
T16_ICAP2 can be moved to PD1
T16_OCMP1 can be moved to PD3
T16_OCMP2 can be moved to PD5
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