HY63V16400A
256Kx16bit CMOS FAST SRAM
Preliminary
DESCRIPTION
The HY63V16400A is a 4,194,304-bit high-speed
SRAM organized as 262,144 words by 16 bits.
The HY63V16400A uses sixteen common input
and output lines and has an output enable pin
which operates faster than address access time at
a read cycle. Also it allows that lower and upper
byte access by data byte control (/UB, /LB). The
device is fabricated using HYUNDAI's advanced
CMOS process and designed for high-speed
circuit technology. It is particularly well suited for
being used in high-density and low power system
applications.
FEATURES
•
•
•
•
Single 3.3V+0.3V Power Supply
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Data Byte Control
- /LB : I/O1 ~ I/O8, /UB : I/O9 ~ I/O16
•
Low data Retention Voltage:
- 2.0V(min) : L-ver.Only
•
Center Power/Ground Pin Configuration
•
Standard pin configuration
- 44pin 400mil SOJ
- 44pin 400mil TSOP-ll
Product
No.
HY63V16400A
Voltage
(V)
3.3
Speed
(ns)
10
12
15
Operation
Current/Icc(mA)
240
230
220
Standby Current(uA)
L
10
1
10
1
10
1
PIN CONNECTION
( Top View )
BLOCK DIAGRAM
SENSE AMP
A0
ROW
DECODER
I/O1
OUTPUT BUFFER
A0
A1
A2
A3
A4
/C S
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
/W E
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
/O E
/U B
/L B
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A14
A13
A12
A11
A10
ADD INPUT BUFFER
DECODER
I/O8
MEMORY ARRAY
512x512x16
WRITE DRIVER
I/O9
I/O16
A17
/CS
/OE
/LB
/UB
/WE
SOJ/TSOPll
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Function
Chip Select
Write Enable
Output Enable
Low Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A17
Vcc
Vss
NC
Pin Function
Data Input/Output
Address Input
Power(+3.3V)
Ground
No Connection
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.1 / Jun. 2000
Hyundai Semiconductor
HY63V16400A
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
V
IN,
V
OUT
Vcc
T
A
T
STG
P
D
Parameter
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Operating Temperature
Storage Temperature
Power Dissipation
Rating
-0.5 to 4.6
-0.5 to 5.5
0 to 70
-65 to 150
1.0
Unit
V
V
°C
°C
W
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliability.
TRUTH TABLE
/CS
H
L
L
L
/WE
X
H
X
H
/OE
X
H
X
L
/LB
X
X
H
L
H
L
L
H
L
/UB
X
X
H
H
L
L
H
L
L
MODE
Not Select
Output Disable
Read
I/O Pin
I/O1 - I/O8 I/O9 - I/O16
High-Z
High-Z
High-Z
Dout
High-Z
Dout
Din
High-Z
Din
High-Z
High-Z
Dout
Dout
High-Z
Din
Din
Supply Current
Standby
Active
Active
L
L
X
Write
Active
Note
1.H=V
IH
, L=V
IL
, X=Don’ t Care.
DC ELECTRICAL CHARACTERISTICS
Vcc = 3.3V+0.3V, T
A
= 0°C to 70°C, unless otherwise specified.
Symbol
Parameter
Test Condition
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
I
LO
Output Leakage Current Vss < V
OUT
< Vcc,
/
CS
=
V
IH
or /OE = V
IH
or /WE = V
IL
Icc
Operating Power Supply /CS = V
IL
, V
IN
= V
IH
,
10ns
Current
I
I/O =
0mA
12ns
Min. Duty Cycle = 100%
15ns
I
SB
TTLStandbyCurrent
/CS = V
IH,
V
IN
= V
IH
or V
IL,
(TTL Input)
Min. Cycle
I
SB1
CMOS Standby Current /CS > Vcc - 0.2V, V
IN
>
(CMOS Input)
Vcc-0.2V or V
IN
< 0.2V, f =0Mhz L
V
OL
Output Low Voltage
I
OL
= 8.0mA
V
OH
Output High Voltage
I
OH =
-4.0mA
Note : Typical values are at Vcc = 3.3V, T
A
= 25°C
Min.
-2
-2
-
-
-
-
-
-
-
2.4
Typ.
-
-
-
-
-
-
-
-
-
-
Max.
2
2
240
230
220
60
10
1
0.4
-
Unit
uA
uA
mA
mA
mA
mA
mA
mA
V
V
Rev.1 / Jun. 2000
2
HY63V16400A
RECOMMENDED DC OPERATING CONDITION
(T
A
=0°C to 70°C)
Symbol
Vcc
Vss
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
3.0
0
2.0
-0.3
(1)
Typ.
3.3
0
-
-
Max.
3.6
0
Vcc+0.3(2)
0.8
Unit
V
V
V
V
Note
1. V
IL
(min) = -2.0V a.c(pulse width < 8ns) for I < 20mA
2. V
IH
(max) = Vcc + 2.0V a.c(pulse width < 8ns) for I < 20mA
CAPACITANCE
(Temp = 25°C, f = 1.0MHz)
Symbol
Parameter
C
IN
Input Capacitance
C
I/O
Input/Output Capacitance
Condition
V
IN
= 0V
V
I/O
= 0V
Max.
7
8
Unit
pF
pF
Note : These parameters are sampled and not 100% tested
AC CHARACTERISTICS
Vcc = 3.3V+0.3V, T
A
= 0°C to 70°C, unless otherwise specified
10ns
#
Symbol
Parameter
Min
Max
12ns
Min
Max
12
-
-
-
-
3
0
0
0
0
0
3
12
8
8
0
8
12
0
0
6
0
3
-
12
12
6
6
-
-
-
6
6
6
-
-
-
-
-
-
-
-
6
-
-
-
15ns
Min
Max
15
-
-
-
-
3
0
0
0
0
0
3
15
10
10
0
10
15
0
0
7
0
3
-
15
15
7
7
-
-
-
7
7
7
-
-
-
-
-
-
-
-
7
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ CYCLE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
tOHZ
tBHZ
tOH
tWC
tCW
tAW
tAS
tWP
tWP1
tWR
tWHZ
tDW
tDH
tOW
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/UB,/LB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/UB,/LB Enable to Low-Z Output
Chip Deselecting to Output in High Z
Out Disable to Output in High Z
/UB,/LB Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width(/OE High)
Write Pulse Width(/OE Low)
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
10
-
-
-
-
3
0
0
0
0
0
3
10
7
7
0
7
10
0
0
5
0
3
-
10
10
5
5
-
-
-
5
5
5
-
-
-
-
-
-
-
-
5
-
-
-
WRITE CYCLE
Rev.1 / Jun. 2000
3
HY63V16400A
AC TEST CONDITIONS
Vcc = 3.3V+0.3V, T
A
= 0°C to 70°C, unless otherwise specified
PARAMETER
Value
Input Pulse Level
0V to 3V
Input Rise and Fall Time
3ns
Input and Output Timing Reference Level
1.5V
Output Load
See below
AC TEST LOADS
Output Load(A)
Output Load(B)
(for tCHZ, tCLZ, tOHZ, tOLZ, tWHZ & tOW)
+
3.3V
Z
o
=50ohm
Dout
Dout
R
L
=50ohm
353ohm
V
L
= 1.5V
5pF *
319ohm
Note : *Including jig and scope capacitance
Rev.1 / Jun. 2000
4
HY63V16400A
TIMING DIAGRAM
READ CYCLE 1(Note 1)
tRC
ADDR
tAA
OE
tOE
tOLZ(5)
CS
tACS
tBA
UB,LB
tBLZ(5)
tCLZ
Data
Out
High-Z
tBHZ(5)
Data Valid
tOHZ(5)
tCHZ(5)
tOH
READ CYCLE 2(Note 1,2,4)
tRC
ADDR
tAA
tOH
Data
Out
Previous Data
Data Valid
tOH
READ CYCLE 3(Note 1,3,4)
CS
tACS
tCLZ(5)
Data
Out
Data Valid
tCHZ(5)
Notes:
1. /WE is high for the Read Cycle.
2. Device is continuously selected. /CS = V
IL
3. Address valid is prior to or coincident with /CS transition low
4. /OE = V
IL
5. Transition is measured + 200mV from steady state voltage
Rev.1 / Jun. 2000
5
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