MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
72-Segment / 128-Segment
LCD Drivers
CMOS
The MC14LC5003/5004 are 128-segment, multiplexed-by-four LCD Driv-
ers. The MC14LC5002 is the same as MC14LC5003 except for 72 segments.
The three devices are functionally the same except for their data input pro-
tocols. The MC14LC5002/5003 use a serial interface data input protocol. The
devices may be interfaced to the MC68HCXX product families using a minimal
amount of software (see example). The MC14LC5004 has a IIC interface and
has essentially the same protocol, except that the device sends an acknowl-
edge bit back to the transmitter after each eight-bit byte is received.
MC14LC5004 also has a “read mode”, whereby data sent to the device may
be retrieved via the IIC bus.
The MC14LC5002/5003/5004 drive the liquid crystal displays in a multi-
plexed-by-four configuration. The devices accept data from a microprocessor
or other serial data source to drive one segment per bit. The chip does not
have a decoder, allowing for the flexibility of formatting the segment data
externally.
Devices are independently addressable via a two-wire (or three-wire) com-
munication link which can be common with other peripheral devices.
The MC14LC5003/5004 are low cost version of MC145003 and MC145004
without cascading function.
•
•
•
•
•
•
•
•
Drives 72 Segments Per MC14LC5002’s Package
Drives 128 Segments Per MC14LC5003/5004’s Package
May Be Used with the Following LCDs: Segmented Alphanumeric,
Bar Graph, Dot Matrix, Custom
Quiescent Supply Current: 30
µ
A @ 2.7 V V
DD
Operating Voltage Range: 2.7 to 5.5 V
Operating Temperature Range: - 40 to 85
°
C
Separate Access to LCD Drive Section’s Supply Voltage to Allow for Tem-
perature Compensation
See Application Notes AN1066 and AN442
MC14LC50
MC14LC50
MC14LC50
F
C
F
C
MC14LC5002FB TQFP
MC14LC5003FU QFP
MC14LC5004FU QFP
MCC14LC5003
MCC14LC5004
MCC14LC5003Z
MCC14LC5004Z
ORDERING INFORMAT
BARE D
BARE D
AU BUM
AU BUM
REV 7
02/98
MOTOROLA
MC14LC5002 • MC14LC5003 • MC
MC14LC5002 BLOCK DIAGRAM
FP1-FP4, FP9-FP12,
FP17-FP20, FP25-FP28
& FP31-FP32
V
LCD
BP1-BP4
OSC1
OSC2
OSCILLATOR
DRIVERS
DRIVERS
FRAME
SYNC
GENERATOR
POR
DATA AND ADDRESS
DCLK
D
in
CONTROL AND TIMING
LCD VOLTAGE
WAVEFORM
AND TIMING
GENERATOR
128 - 32
MULTIPLEX
128-BIT LATCH
A0/A1
A2
ENB
128-BIT SHIFT REGISTER
MC14LC5002 PIN ASSIGNMENT
OSC1
FP32
FP31
FP28
FP27
FP26
FP25
FP20
32
31
30
29
28
27
26
25
OSC2
VDD
BP1
BP2
BP3
BP4
A0/A1
A2
1
2
3
4
5
6
7
8
MC14LC5002
24
23
22
21
20
19
18
17
ENB
Din
DCLK
FP1
FP2
FP3
FP4
FP9
FP19
FP18
FP17
VLCD
MC14LC5002 • MC14LC5003 • MC14LC5004
3–4
V SS
FP12
FP11
FP10
9
10
11
12
13
14
15
16
MC14LC5003/MC14LC5004 BLOCK DIAGRAM
V
LCD
BP1-BP4
FP1-FP32
OSC1
OSC2
OSCILLATOR
DRIVERS
DRIVERS
FRAME
SYNC
GENERATOR
POR
LCD VOLTAGE
WAVEFORM
AND TIMING
GENERATOR
128 - 32
MULTIPLEX
DATA AND ADDRESS
DCLK
D
in
A0
A1
A2
ENB
CONTROL AND TIMING
128-BIT LATCH
128-BIT SHIFT REGISTER
MC14LC5003/MC14LC5004 PIN ASSIGNMENT
NC
OSC1
OSC2
VDD
BP1
BP2
BP3
BP4
A0
A1
A2
ENB
NC
FP32
FP31
FP30
FP29
FP28
FP27
FP26
FP25
FP24
FP23
FP22
FP21
FP20
1
2
3
4
5
6
7
8
9
10
11
12
13
52
51
50
49
48
47
46
45
44
43
42
41
40
MC14LC5003
OR
MC14LC5004
39
38
37
36
35
34
33
32
31
30
29
28
27
Din
DCLK
NC
FP1
FP2
FP3
FP4
FP5
FP6
FP7
FP8
FP9
FP10
MOTOROLA
NC
FP19
FP18
FP17
FP16
FP15
V LCD
VSS
FP14
FP13
FP12
FP11
NC
14
15
16
17
18
19
20
21
22
23
24
25
26
NC=NO CONNECTION
MC14LC5002 • MC14LC5003 • MC
ABSOLUTE MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Symbol
V
DD
V
in
V
in osc
I
in
T
A
T
stg
Parameter
DC Supply Voltage
Input Voltage, D
in
, and Data Clock
Input Voltage, OSC
in
of Master
DC Input Current, per Pin
Operating Temperature Range
Storage Temperature Range
Value
- 0.5 to + 6.5
- 0.5 to + 15
- 0.5 to V
DD
+ 0.5
±
10
- 40 to + 85
- 65 to + 150
Unit
V
V
V
mA
°
C
°
C
This device contains pro
to guard against damage d
voltages or electric fields. H
tions must be taken to avoid
any voltage higher than max
ages to this high-impedan
device may be light sens
should be taken to avoid e
device to any light source du
eration. This device is not ra
ed.
* Maximum Ratings are those values beyond which damage to the device may occur. Func-
tional operation should be restricted to the limits in the Electrical Characteristics tables or
Pin Descriptions section.
ELECTRICAL CHARACTERISTICS
(Voltages Referenced to V
SS
, T
A
= 25°C)
Characteristic
Output Drive Current — Frontplanes
V
O
= 0.15 V
V
O
= 2.65 V
V
O
= 1.72 V
V
O
= 1.08 V
V
O
= 0.15 V
V
O
= 5.35 V
V
O
= 3.52 V
V
O
= 1.98 V
Supply Standby Currents (No Clock)
I
DD
= Standby @ I
out
= 0
µ
A
I
LCD
= Standby @ I
out
= 0
µ
A
I
DD
= Standby @ I
out
= 0
µ
A
I
LCD
= Standby @ I
out
= 0
µ
A
Supply Currents (f
OSC
) = 110 kHz
I
DD
= Quiescent @ I
out
= 0
µ
A, no loading
I
DD
= Quiescent @ loading = 270pF
I
DD
= Quiescent @ I
out
= 0
µ
A, no loading
I
DD
= Quiescent @ loading = 270pF
I
LCD
= Quiescent @ I
out
= 0
µ
A, no loading
I
LCD
= Quiescent @ I
out
= 0
µ
A, no loading
Input Current
Input Capacitance
I
FH
I
FL
I
FH
I
FL
I
FH
I
FL
I
FH
I
FL
I
FH
I
FL
I
FH
I
FL
I
FH
I
FL
I
FH
I
FL
I
DDS
I
LCDS
I
DDS
I
LCDS
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
2.7
2.7
2.7
2.7
2.7
2.7
2.7
2.7
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
260
260
-240
-240
-40
—
40
—
600
600
-520
-520
-35
—
55
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-1.5
—
2
—
—
—
—
—
-1.5
—
1
µ
A
2.7
—
5.5
—
—
2.7
—
5.5
—
—
—
—
—
—
—
—
30
800
50
1500
µ
A
I
DDQ
I
DDQ
I
DDQ
I
DDQ
I
LCDQ
I
LCDQ
I
in
C
in
2.7
2.7
5.5
5.5
—
—
—
—
—
—
—
—
2.7
5.5
—
—
—
—
—
—
—
—
-0.1
—
30
—
170
—
—
—
—
—
—
70
—
400
40
70
0.1
7.5
µ
A
pF
Symbol
V
DD
V
V
LCD
V
Min
Typical
Max
Unit
µ
A
MC14LC5002 • MC14LC5003 • MC14LC5004
3–6
ELECTRICAL CHARACTERISTICS
(Continued)
Characteristic
Frequencies
OSC2 Frequency @ R1; R1 = 200 k
Ω
BP Frequency @ R1
OSC2 Frequency @ R2; R2 = 996 k
Ω
Symbol
f
OSC2
f
BP
f
OSC2
V
OO
V
IL
V
IL
V
IH
V
IH
I
BH *
I
BL
I
BH
I
BL
I
BH
I
BL
I
BH
I
BL
I
BH
I
BL
I
BH
I
BL
I
BH
I
BL
I
BH
I
BL
t
w
t
r
, t
f
t
su
t
h
t
start
t
stop
t
h
t
rec
t
w
t
su
V
DD
V
V
LCD
V
Min
Typical
Max
Unit
kHz
Hz
kHz
mV
V
5
5
5
5
2.8
5.5
2.8
5.5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
5
5
2.8
5
5
5
5
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
100
100
23
-50
—
—
2
3.85
-240
-240
260
260
40
—
-40
—
-520
-520
600
600
55
—
-35
—
100
100
—
—
20
20
40
60
100
100
100
100
20
20
20
20
100
100
20
20
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
150
150
33
+50
0.85
1.65
—
—
—
—
—
—
—
2
—
-1
—
—
—
—
—
1
—
-1
—
—
120
120
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Average DC Offset Voltage (BP Relative to FP)
Input Voltage
“0” Level
“1” Level
Output Drive Current — Backplanes V
O
= 2.65 V
V
O
= 0.15 V
V
O
= 1.08V
V
O
= 1.72 V
V
O
= 5.35 V
V
O
= 0.15 V
V
O
= 1.98 V
V
O
= 3.52 V
Pulse Width, Data Clock
DCLK Rise/Fall Time
Setup Time, D
in
to DCLK
Hold Time, D
in
to DCLK
Hold Time for START condition
Hold Time for STOP condition
DCLK Low to ENB High
ENB High to DCLK High
ENB High Pulse Width
ENB Low to DCLK High
(Figure 1)
(Figure 1)
(Figure 2)
(Figure 2)
(Figure 2)
(Figure 2)
(Figure 3)
(Figure 3)
(Figure 3)
(Figure 3)
µ
A
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
NOTE: Timing for Figures 1, 2, and 3 are design estimates only.
* For a time (t = 4/OSC FREQ.) after the backplane waveform changes to a new voltage level, the circuit is maintained in the hig
allow the load capacitances to charge quickly. The circuit is then returned to the low-current state until the next voltage change
MOTOROLA
MC14LC5002 • MC14LC5003 • MC
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