UltraMAX
T
H E
TM
LX5241/5242/5243
D
A T A
M
U LT I M O D E
S C S I T
E R M I N AT O R
I
N F I N I T E
P
O W E R
O F
I
N N O VA T I O N
P
R O D U C T I O N
S
H E E T
DESCRIPTION
The LX5241/42/43 is a multimode SCSI terminator
that conforms to the SCSI Parallel Interconnect-
2 (SPI-2) specification developed by the T10
standards committee for low voltage differential
(LVD) termination, while providing backwards
compatibility to the SCSI, SCSI-2, and SPI single-
ended specifications. Multimode compatibility
permits the use of legacy devices on the bus
without hardware alterations. Automatic mode
selection is achieved through voltage detection
on the diffsense line.
The LX5241/42/43 utilizes Linfinity’s UltraMAX
technology which delivers the ultimate in SCSI
bus performance while saving component cost
and board area. Elimination of the external
capacitors also mitigates the need for a lengthy
capacitor selection process. The individual high
bandwidth drivers also maximize channel sepa-
ration and reduce channel to channel noise and
cross talk. The high bandwidth architecture
insures ULTRA2 performance while providing a
clear migration path to ULTRA3 and beyond.
When the LX5241/42/43 is enabled, the dif-
ferential sense (DIFFSENSE) pin supplies a
voltage between 1.2V and 1.4V. In application,
this pin is tied to the DIFFSENSE input of the
corresponding LVD transceivers. This action
enables the LVD transceiver function.
DIFFSENSE is capable of supplying a maximum
of 15mA. Tying the DIFFSENSE pin high places
the LX5241/42/43 in a HI Z state indicating the
presence of an HVD device. Tying the pin low
places the part in a single-ended mode while
also signaling the multimode transceiver to
operate in a single-ended mode.
Recognizing the needs of portable and
configurable peripherals, the LX5241/42/43
have a TTL compatible sleep/disable mode.
During this sleep/disable mode, power dissipa-
tion is reduced to a meager 15µA while also
placing all outputs in a HI Z state. Also during
sleep/disable mode, the DIFFSENSE function is
disabled and is placed in a HI Z state.
Another key feature of the LX5241/42/43 is
the master / slave function. Driving this pin
high or floating the pin enables the 1.3V
DIFFSENSE reference. Driving the pin low
disables the on board DIFFSENSE reference and
enables use of an external master reference
device.
K E Y F E AT U R E S
s
Auto-Selectable LVD or
Single-Ended Termination
s
3.0pF Maximum Disabled Output
Capacitance
s
Fast Response, No External Capacitors
Required
s
Compatible with Active Negation Drivers
s
15µA Supply Current in Disconnect
Mode
s
Logic Command Disconnects All
Termination Lines
s
Diffsense Line Driver
s
Ground Driver Integrated for Single-
Ended Operation
s
Current Limit and Thermal Protection
s
Hot-Swap Compatible
(Single-Ended)
s
Compatible with SCSI 1, 2, 3, Fast-20,
and the Pending SPI-2 LVD
s
See LX5245/5246 for LVD
Termination Only
s
Pin Compatible With DS2119 and
UCC5630
NOTE:
For current data & package dimensions, visit our web site:
http://www.linfinity.com.
PRODUCT HIGHLIGHT
B
U S
V
O LTA G E 6
V
OD
V
OD
= V
(-)
- V
(+)
, Logic = 0
V
(+)
100mV
0V
NEGATED
V
CM
V
(-)
-100mV
LX5241
LX5241
PA C K A G E O R D E R I N F O R M AT I O N
T
A
(°C)
0 to 70
DB
Plastic SSOP
36-pin
LX5241CDBK
LX5242CDBK
PW
Plastic TSSOP
24-pin
LX5241CPWK
LX5242CPWK
PW
Plastic TSSOP
28-pin
LX5243CPW
—
Note: All surface-mount packages are available in Tape & Reel.
Append the letter "T" to part number. (i.e. LX5241CDBT)
Copyright © 2000
Rev. 1.3 10/00
L
IN
F
INITY
M
ICROELECTRONICS
I
NC
.
11861 W
ESTERN
A
VENUE
, G
ARDEN
G
ROVE
, CA. 92841, 714-898-8121, F
AX
: 714-893-2570
1
PRODUCT DATABOOK 1996/1997
LX5241/5242/5243
M
U LT I M O D E
S C S I T
E R M I N AT O R
P
R O D U C T I O N
UltraMAX
D
A T A
S
H E E T
PACKAGE PIN OUTS
N.C.
N.C.
N.C.
1+
1-
2+
2-
HEATSINK
HEATSINK
HEATSINK
3+
3-
4+
4-
5+
5-
DISCONNECT
GND
1
2
3
4
5
6
7
8
9
106
116
126
136
146
156
16
176
186
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A B S O L U T E M A X I M U M R AT I N G S
(Note 1)
TermPwr Voltage ................................................................................................. +7V
Operating Junction Temperature
Plastic (DB, PW Packages) .......................................................................... 150°C
Storage Temperature Range .............................................................. -65°C to 150°C
Lead Temperature (Soldering, 10 seconds) .................................................... 300°C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with
respect to Ground. Currents are positive into, negative out of the specified
terminal.
T H E R M A L D ATA
DB PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
PW PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
100°C/W
50°C/W
V
TERM
HVD
LVD
SE
9-
9+
8-
8+
HEATSINK
HEATSINK
HEATSINK
7-
7+
6-
6+
DIFF B
DIFFSENSE
MASTER/SLAVE
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
DB PACKAGE
(Top View)
LX5241/5242
("N.C." = No Internal Connection)
1+
1
2
3
4
5
6
7
8
9
106
116
126
24
23
22
21
20
19
18
17
16
15
14
13
V
TERM
N.C.
9-
9+
8-
8+
7-
7+
6-
6+
DIFFSENSE
MASTER/SLAVE
MASTER / SLAVE F
UNCTION
T
ABLE
MASTER /
SLAVE
L*
H
Open (Pull-up)
HI Z
1.3V
1.3V
DIFFSENSE
Status
0mA
15mA Source
15mA Source
* When in Low state, terminator will detect state of DIFFSENSE line.
1-
2+
2-
3+
3-
4+
4-
5+
5-
DISCONNECT
GND
DIFFSENSE / P
OWER
U
P
/ P
OWER
D
OWN
F
UNCTION
T
ABLE
LX5241/5243
LX5242
DISCONNECT DISCONNECT
L
H
DIFF
SENSE
L < 0.5V
Outputs
Status
Type
PW PACKAGE
(Top View)
LX5241/5242
("N.C." = No Internal Connection)
Quiescent
Current
7mA
Enable
S.E.
L
H
0.7 - 1.9V
Enable
LVD
21mA
L
H
Open
H
L
Open
H > 2.4V
X
Disable
Disable
HI Z
HI Z
1mA
10µA
N.C.
1+
1-
2+
2-
N.C.
3+
3-
4+
4-
5+
5-
DISCONNECT
GND
1
2
3
4
5
6
7
8
9
106
116
126
136
146
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
TERM
N.C.
9-
9+
8-
8+
N.C.
7-
7+
6-
6+
DIFFB
DIFFSENSE
MASTER/SLAVE
PW PACKAGE
(Top View)
LX5243
("N.C." = No Internal Connection)
2
Copyright © 2000
Rev. 1.3 10/00
PRODUCT DATABOOK 1996/1997
UltraMAX
M
U LT I M O D E
S C S I T
E R M I N AT O R
P
R O D U C T I O N
LX5241/5242/5243
D
A T A
S
H E E T
(Note 2)
R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S
Parameter
Termpwr Voltage
LVD
SE
Symbol
V
TERM
Recommended Operating Conditions
Min.
Typ.
Max.
3.0
3.5
0
0
0
5.25
5.25
5.0
V
TERM
70
Units
V
V
V
V
°C
Signal Line Voltage
Disconnect Input Voltage
Operating Virtual Junction Temperature Range
LX5241C / 5242C / 5243C
Note 2. Range over which the device is functional.
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C
≤
T
A
≤
70°C, TermPwr = 4.75V.
For the LX5241/5243 DISCONNECT = L, for the LX5242 DISCONNECT = H. Low duty cycle pulse testing techniques are used which maintains junction and
case temperatures equal to the ambient temperature.)
Parameter
LVD Terminator Section
TermPwr Supply Current
Common Mode Voltage
Offset Voltage
Differential Terminator Impedance
Common Mode Impedance
Output Capacitance
Output Leakage
Symbol
Test Conditions
LX5241 / 5242 / 5243
Min. Typ.
Max.
25
15
1.25
112
105
200
2.5
30
35
1.375
125
110
300
2
1
115
1.2
5.0
1.3
1.4
15.0
200
10
Units
LVD I
CC
V
CM
V
FSB
Z
D
Z
CM
C
O
I
LEAK
All term lines = Open
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V
Open circuit between - and + (see Note 3)
V
OUT
Differential = -1V to 1V
0V to 2.5V
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,
V
LINE
= 0 to 4V, T
A
= 25°C
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,
V
TERM
= 0V, V
LINE
= 2.7V
DIFFSENSE = 1.4V to 0V
1.125
100
100
100
mA
µA
V
mV
Ω
Ω
pF
µA
µA
ms
V
mA
µA
µA
Mode Change Delay
t
DF
V
DIFF
I
DIFF
I
SINK(DIFF)
I
LEAK(DIFF)
DIFFSENSE Section
DIFFSENSE Output Voltage
DIFFSENSE Output Source Current
DIFFSENSE Sink Current
DIFFSENSE Output Leakage
V
DIFF
= 0V
V
DIFF
= 2.75V
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,
T
A
= 25°C
All term lines = Open, Master/Slave = 0V
All term lines = 0.2V, Master/Slave = 0V
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V
V
OUT
= 0.2V
V
OUT
= 4V, All lines
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,
V
OUT
= 0 to 4V, T
A
= 25°C
LX5241/5243: DISCONNECT > 2.0V, LX5242: DISCONNECT < 0.8V,
V
TERM
= Open, V
LINE
= 2.7V, T
A
= 25°C
2.6
21
45
Single-Ended Termination Section
Termpwr Supply Current
SE I
CC
7
214
15
2.85
23
65
2.5
10
226
35
24
mA
mA
µA
V
mA
mA
pF
µA
µA
Terminator Output High Volt
Output Current
Sink Current
Output Capacitance
Leakage Current
V
O
I
O
I
SINK
C
O
I
LEAK
2
1
Note 3. Open circuit failsafe voltage.
Copyright © 2000
Rev. 1.3 10/00
3
PRODUCT DATABOOK 1996/1997
LX5241/5242/5243
M
U LT I M O D E
S C S I T
E R M I N AT O R
P
R O D U C T I O N
UltraMAX
D
A T A
S
H E E T
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Test Conditions
LX5241 / 5242
Min. Typ.
Max.
100
150
V
TH
I
IL
I
IL
I
IH
I
IH
V
TH (MS)
I
IL (MS)
I
IH (MS)
0.8
DISCONNECT = 0V
DISCONNECT = 0V
DISCONNECT = 2.4V
DISCONNECT = 2.4V
0.8
MASTER / SLAVE = 0V
MASTER / SLAVE = 2.4V
100
100
100
10
2.0
10
2.0
10
Units
Ω
°C
V
µA
nA
nA
µA
V
µA
nA
Single-Ended Termination Section
(continued)
Ground Driver Impedance
Thermal Shutdown
Z
G
I = 1mA
DISCONNECT Section
DISCONNECT Thresholds
Input Current
LX5241/43
LX5242
LX5241/43
LX5242
MASTER / SLAVE Section
MASTER / SLAVE Thresholds
Input Current
BLOCK DIAGRAM
1 of 9
SE
2.85V, 22.5mA
Power ON
V
TERM
DISCONNECT
Internal V
REF
1.30V
S.E.
2.2V
1.07mA
SE
DISC/HVD
LVD
52.5
LVD
1.25V
200
SE
52.5
HVD
LVD (-)
/ SE
LVD (+)
/ SE
(Pseudo-GND)
LVD
M/S
10mA
1.07mA
20
DIFFSENSE
MODE Control & Delay
LATCH
SE
DIFFB
Window
Comp.
LVD
HVD
SE
HVD
LVD
Power ON
POWER
ON
&
MODE
DELAY
FIGURE 1
— LX5241/5242 Block Diagram
4
Copyright © 2000
Rev. 1.3 10/00
PRODUCT DATABOOK 1996/1997
UltraMAX
M
U LT I M O D E
S C S I T
E R M I N AT O R
P
R O D U C T I O N
LX5241/5242/5243
D
A T A
S
H E E T
FUNCTIONAL PIN DESCRIPTION
Pin
Designator
1-, 2-, 3-, 4-, 5-, 6-, 7-, 8-, 9-6
V
TERM
Description
Negative signal termination lines for LVD mode. Signal termination lines for SE mode.
Power supply pin for terminator. Connect to SCSI bus TERMPWR. Must be decoupled by one 4.7µF
low-ESR capacitor for every three terminator devices. It is absolutely necessary to connect this pin to
the decoupling capacitor through a very low impedance (big traces on PCB). Keeping distances very
short from the decoupling capacitors to the V
TERM
pin is also critical. The value of the decoupling
capacitor is somewhat layout dependant and some applications may benefit from high-frequency
decoupling with 0.1µF capacitors right at V
TERM
pin.
Enables / disables terminator. See Power Down Function Table for logic levels per device.
Terminator ground pin. Connect to ground.
Sometimes referred to as M/S pin in this data sheet. Used to select which terminator is the control-
ling device. MASTER/SLAVE pin High or Open enables the DIFFSENSE output drive. Please see
MASTER/SLAVE Function Table.
This is a dual function pin. It drives the SCSI bus DIFFSENS line. It is also the sense pin to detect the
SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with Low level on the
MASTER/SLAVE pin. Please see DIFFSENSE and MASTER/SLAVE Function Tables. Internally
connected to DIFFB pin through 20kOhm resistor.
Internally connected to DIFFSENSE pin through 20kOhm resistor. It can be used as a mode sense
pin when the device is a non-controlling terminator (MASTER/SLAVE pin is Low). An RC filter
(20kOhm / 0.1µF) is not required on the LX5241/42/43, as it has an internal timer.
Single-ended output; when High, terminator is operating in SE mode.
Low Voltage Differential output. When High, terminator is operating in LVD mode.
High Voltage Differential output. When High, terminator is operating in HVD mode.
Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink
only, and not a true ground connection. It is recommeneded that these pins be connected to ground,
but can be left floating.
1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+ Positive signal termination lines for LVD mode. Pseudo-ground lines for SE mode.
DISCONNECT6
GND6
MASTER / SLAVE6
DIFFSENSE6
DIFFB6
SE6
LVD6
HVD6
HEATSINK6
Copyright © 2000
Rev. 1.3 10/00
5
Power technology
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