®
®
ADS-943
14-Bit, 3MHz, Low-Distortion
Sampling A/D Converters
FEATURES
•
•
•
•
•
•
•
•
•
14-bit resolution
3MHz minimum sampling rate
Ideal for both frequency and time-domain applications
Excellent peak harmonics, –83dB
Excellent signal-to-noise ratio, 79dB
No missing codes over full military temperature range
±5V supplies, 1.7 Watts
Small, 24-pin ceramic DDIP or SMT
Low cost
PIN
1
2
3
4
5
6
7
8
9
10
11
12
INPUT/OUTPUT CONNECTIONS
FUNCTION
BIT1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
PIN
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
ANALOG GROUND
OFFSET ADJUST
+5V ANALOG SUPPLY
ANALOG INPUT
–5V SUPPLY
ANALOG GROUND
START CONVERT
EOC
BIT 14 (LSB)
BIT 13
DIGITAL GROUND
+5V DIGITAL SUPPLY
GENERAL DESCRIPTION
The low-cost ADS-943 is a 14-bit, 3MHz sampling A/D
converter optimized to meet the demanding dynamic-range
and sampling-rate requirements of contemporary digital
telecommunications applications. The ADS-943's outstanding
dynamic performance is evidenced by a peak harmonic
specification of –83dB and a signal-to-noise ratio (SNR) of
79dB. Additionally, the ADS-943 easily achieves the 2.2MHz
minimum sampling rate required by digital receivers in certain
ADSL, HDSL and ATM applications. The ADS-943 also
addresses size and power constraints normally associated with
these types of applications. This device requires just ±5V
supplies, dissipates 1.7 Watts, and is packaged in a very small
24-pin DDIP.
Although optimized for frequency-domain applications, the
ADS-943's DNL and noise specifications are also outstanding,
thereby making it an equally impressive device for time-domain
applications (graphic and medical imaging, process control,
etc.). In fact, the ADS-943 guarantees no missing codes to the
14-bit level over the full military operating temperature range.
The functionally complete ADS-943 contains a fast-settling
sample-hold amplifier, a subranging (two-pass) A/D converter,
an internal reference, timing/control logic, and error-correction
circuitry. Digital input and output levels are TTL. The unit is
edge-triggered, requiring only the rising edge of a start convert
pulse to initiate a conversion.
The device is offered with a bipolar input range of ±2V. Models
are available for use in either commercial (0 to +70°C) or
military (–55 to +125°C) operating temperature ranges. A
proprietary, auto-calibrating, error-correcting circuit allows the
device to achieve specified performance over the full military
temperature range.
OFFSET ADJUST 23
BUFFER
REGISTER
ANALOG INPUT 21
–
S/H
+
FLASH
ADC
1
16 BIT 14 (LSB)
15 BIT 13
12 BIT 12
DIGITAL CORRECTION LOGIC
11 BIT 11
OUTPUT REGISTER
10 BIT 10
9
8
7
6
5
4
3
2
1
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1 (MSB)
POWER AND GROUNDING
REF
+5V ANALOG SUPPLY
+5V DIGITAL SUPPLY
DIGITAL GROUND
–5V SUPPLY
ANALOG GROUND
22
13
14
20
19, 24
AMP
FLASH
ADC
2
REGISTER
DAC
Σ
START CONVERT 18
EOC 17
TIMING AND
CONTROL LOGIC
Figure 1. ADS-943 Functional Block Diagram
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)
•
Tel: (508) 339-3000 Fax: (508) 339-6356
•
For immediate assistance: (800) 233-2765
®
®
ADS-943
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
+5V Supply
(Pins 13, 22)
–5V Supply
(Pin 20)
Digital Input
(Pin 18)
Analog Input
(Pin 21)
Lead Temperature
(10 seconds)
LIMITS
0 to +6
0 to –6
–0.3 to +V
DD
+0.3
–5 to +5
+300
UNITS
Volts
Volts
Volts
Volts
°C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
Operating Temp. Range, Case
ADS-943MC, GC
ADS-943MM, GM, 883, G/883
Thermal Impedance
θjc
θca
Storage Temperature Range
Package Type
Weight
MIN.
0
–55
TYP.
—
—
MAX.
+70
+125
UNITS
°C
°C
—
6
—
°C/Watt
—
23
—
°C/Watt
–65
—
+150
°C
24-pin,metal-sealed, ceramic DDIP or SMT
0.42 ounces (12 grams)
FUNCTIONAL SPECIFICATIONS
(T
A
= +25°C, ±V
DD
= ±5V, 3MHz sampling rate, and a minimum 3 minute warmup
unless otherwise specified.)
+25°C
ANALOG INPUT
Input Voltage Range
Input Resistance
Input Capacitance
DIGITAL INPUT
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Start Convert Positive Pulse Width
STATIC PERFORMANCE
Resolution
Integral Nonlinearity
(f
in
= 10kHz)
Differential Nonlinearity
(f
in
= 10kHz)
Full Scale Absolute Accuracy
Bipolar Zero Error
(Tech Note 2)
Gain Error
(Tech Note 2)
No Missing Codes
(f
in
= 10kHz)
DYNAMIC PERFORMANCE
Peak Harmonics
(–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Total Harmonic Distortion
(–0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Signal-to-Noise Ratio
(w/o distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Signal-to-Noise Ratio
(& distortion, –0.5dB)
dc to 500kHz
500kHz to 1MHz
1MHz to 1.5MHz
Noise
Two-Tone Intermodulation
Distortion
(f
in
= 975kHz,
1.2MHz, f
s
= 3MHz, –0.5dB)
Input Bandwidth
(–3dB)
Small Signal (–20dB input)
Large Signal (–0dB input)
Feedthrough Rejection
(f
in
= 1.5MHz)
Slew Rate
Aperture Delay Time
Aperture Uncertainty
—
—
—
—
—
—
76
76
75
73
73
73
—
—
—
—
—
—
—
—
–83
–83
–83
–80
–80
–80
79
79
78
77
77
77
125
–82
30
10
85
±400
+5
2
–77
–77
–77
–76
–76
–76
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
76
76
75
73
73
73
—
—
—
—
—
—
—
—
–83
–83
–83
–80
–80
–80
79
79
78
77
77
77
125
–82
30
10
85
±400
+5
2
–77
–77
–77
–76
–76
–76
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
75
74
74
71
71
71
—
—
—
—
—
—
—
—
–81
–81
–81
–78
–77
–77
78
77
77
75
75
74
125
–82
30
10
85
±400
+5
2
–75
–75
–75
–74
–73
–73
—
—
—
—
—
—
—
—
—
—
—
—
—
—
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
µVrms
dB
MHz
MHz
dB
V/µs
ns
ps rms
—
—
–0.95
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+1.25
±0.4
±0.3
±0.5
—
—
—
–0.95
—
—
—
14
14
±0.75
±0.5
±0.15
±0.1
±0.2
—
—
—
+1.25
±0.4
±0.3
±0.5
—
—
—
–0.95
—
—
—
14
14
±1
±0.75
±0.4
±0.3
±0.4
—
—
—
+1.5
±0.6
±0.6
±1.25
—
Bits
LSB
LSB
%FSR
%FSR
%
Bits
+2.0
—
—
—
10
—
—
—
—
20
—
+0.8
+20
–20
—
+2.0
—
—
—
10
—
—
—
—
20
—
+0.8
+20
–20
—
+2.0
—
—
—
10
—
—
—
—
20
—
+0.8
+20
–20
—
Volts
Volts
µA
µA
ns
MIN.
—
—
—
TYP.
±2
280
6
MAX.
—
—
15
MIN.
—
—
—
0 to +70°C
TYP.
±2
280
6
MAX.
—
—
15
MIN.
—
—
—
–55 to +125°C
TYP.
±2
280
6
MAX.
—
—
15
UNITS
Volts
Ω
pF
2
®
®
ADS-943
+25°C
DYNAMIC PERFORMANCE cont.
S/H Acquisition Time
( to ±0.003%FSR, 4V step)
Overvoltage Recovery Time
A/D Conversion Rate
DIGITAL OUTPUTS
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
Output Coding
POWER REQUIREMENTS
Power Supply Ranges
+5V Supply
–5V Supply
Power Supply Currents
+5V Supply
–5V Supply
Power Dissipation
Power Supply Rejection
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+210
–125
1.7
—
+5.25
–5.25
+230
–145
1.9
±0.05
+4.75
–4.75
—
—
—
—
+5.0
–5.0
+210
–125
1.7
—
+5.25
–5.25
+230
–145
1.9
±0.05
+4.9
–4.9
—
—
—
—
+5.0
–5.0
+210
–125
1.7
—
+5.25
–5.25
+230
–145
1.9
±0.05
Volts
Volts
mA
mA
Watts
%FSR/%V
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
+2.4
—
—
—
—
—
—
+0.4
—
–4
—
+4
Offset Binary
+2.4
—
—
—
—
—
—
—
—
+0.4
–4
+4
Volts
Volts
mA
mA
MIN.
—
—
3
TYP.
208
100
—
MAX.
215
333
—
MIN.
—
—
3
0 to +70°C
TYP.
208
100
—
MAX.
215
333
—
MIN.
—
—
3
–55 to +125°C
TYP.
208
100
—
MAX.
215
333
—
UNITS
ns
ns
MHz
Footnotes:
All power supplies should be on before applying a start convert pulse. All
supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.
Contact DATEL for other input voltage ranges.
A 3MHz clock with a 20nsec positive pulse width is used for all production testing.
When sampling at 3MHz, the start convert pulse must be between 10 and
110nsec wide or between 160 and 300nsec wide. The falling edge must not occur
between 110 and 160nsec. For lower sampling rates, wider start pulses may be
used.
Effective bits is equal to:
(SNR + Distortion) – 1.76 +
20 log
6.02
Full Scale Amplitude
Actual Input Amplitude
This is the time required before the A/D output data is valid once the analog input
is back within the specified range. This time is only guaranteed if the input does
not exceed ±2.2V (S/H Saturation Voltage).
The minimum supply voltages of +4.9V and –4.9V for ±V
DD
are required for
–55°C operation only. The minumum limits are +4.75V and –4.75V when
operating at +125°C.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-943
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 19 and 24) directly to a
large
analog
ground plane beneath the package.
Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.
2. The ADS-943 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 2 and 3.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.
GAIN
ADJUST
+5V
SIGNAL
INPUT
1.98k
Ω
50
Ω
To Pin21
of ADS-943
3. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle. Data for the interrupted and subsequent
conversions will be invalid.
4. A passive bandpass filter is used at the input of the A/D for
all production testing.
2k
Ω
–5V
Figure 2. Optional ADS-943 Gain Adjust Calibration Circuit
3
®
®
ADS-943
CALIBRATION PROCEDURE
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuits in Figures 2 and 3 are guaranteed to
compensate for the ADS-943's initial accuracy errors and may
not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.
Offset adjusting for the ADS-943 is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+½ LSB (+122µV).
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1½ LSB's
(+1.99963V).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 18) so the converter is continuously converting.
2. Apply +122µV to the ANALOG INPUT (pin 21).
3. Adjust the offset potentiometer until the output bits are
10 0000 0000 0000 and the LSB flickers between 0 and 1.
–5V
Gain Adjust Procedure
1. Apply +1.99963V to the ANALOG INPUT (pin 21).
2. Adjust the gain potentiometer until all output bits are 1's and
the LSB flickers between 1 and 0.
3. To confirm proper operation of the device, vary the input
signal to obtain the output coding listed in Table 2.
Table 1. Gain and Zero Adjust
INPUT VOLTAGE
RANGE
±2V
ZERO ADJUST
+1/2 LSB
+122µV
GAIN ADJUST
+FS –1½ LSB
+1.99963V
Table 2. Output Coding for Bipolar Operation
BIPOLAR
SCALE
INPUT VOLTAGE
(±2V RANGE)
OFFSET BINARY
MSB
LSB
+FS – 1 LSB
+3/4FS
+1/2FS
0
–1/2 FS
–3/4 FS
–FS +1 LSB
–FS
+1.99976
+1.50000
+1.00000
0.00000
–1.00000
–1.50000
1.99976
–2.00000
11
11
11
10
01
00
00
00
1111
1000
0000
0000
0000
1000
0000
0000
1111
0000
0000
0000
0000
0000
0000
0000
1111
0000
0000
0000
0000
0000
0001
0000
+5V
4.7µF
+
4.7µF 4.7µF
+ +
0.1µF
0.1µF
0.1µF
19
ANALOG
INPUT
+5V
ZERO/
OFFSET
ADJUST
–5V
START
CONVERT
18
20
24
22, 13
14
21
23
20kΩ
ADS-943
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.
Figure 3. Connection Diagram
4
®
®
ADS-943
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of 0 to
+70°C and –55 to +125°C. All room-temperature (T
A
= +25°C)
production testing is performed without the use of heat sinks or
forced-air cooling. Thermal impedance figures for each device
are listed in their respective specification tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
N
START
CONVERT
20ns typ.
333nsec
10ns typ.
INTERNAL S/H
125ns typ.
Hold
Acquisition Time
208ns typ.
215ns max.
N+1
125ns typ.
35ns typ.
EOC
130ns
Conversion Time
120ns min., 130ns typ.,
140ns max.
30ns typ.
10ns max.
OUTPUT
DATA
Data N-1 Valid
Data N Valid
283ns typ.
Invalid
Data
Data N+1 Valid
50ns typ.
Note: 1. Scale is approximately 20ns per division. Sampling rate = 3MHz.
2. The start convert positive pulse width must be between either 10 and 110nsec or
160 and 300nsec (when sampling at 3MHz) to ensure proper operation. For sampling
rates lower than 3MHz, the start pulse can be wider than 300nsec, however a minimum
pulse width low of 30nsec should be maintained. A 3MHz clock with a 20nsec positive
pulse width is used for all production testing.
Figure 4. ADS-943 Timing Diagram
5
Embedded System
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