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25LC320-I/SNRVAG

Description
4K X 8 SPI BUS SERIAL EEPROM, PDSO8, 0.150 INCH, PLASTIC, SOIC-8
Categorystorage    storage   
File Size354KB,24 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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25LC320-I/SNRVAG Overview

4K X 8 SPI BUS SERIAL EEPROM, PDSO8, 0.150 INCH, PLASTIC, SOIC-8

25LC320-I/SNRVAG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instruction0.150 INCH, PLASTIC, SOIC-8
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
Other features1000K ERASE/WRITE CYCLES; DATA RETENTION > 200 YEARS
Maximum clock frequency (fCLK)2 MHz
Data retention time - minimum200
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
memory density32768 bi
Memory IC TypeEEPROM
memory width8
Humidity sensitivity level1
Number of functions1
Number of terminals8
word count4096 words
character code4000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize4KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.75 mm
Serial bus typeSPI
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.5 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9 mm
Maximum write cycle time (tWC)5 ms
Base Number Matches1
25AA320/25LC320/25C320
32K SPI
Bus Serial EEPROM
Device Selection Table
Part
Number
25AA320
25LC320
25C320
V
CC
Range
1.8-5.5V
2.5-5.5V
4.5-5.5V
Max. Clock
Frequency
1 MHz
2 MHz
3 MHz
Temp.
Ranges
I
I,E
I,E
Description
The Microchip Technology Inc. 25AA320/25LC320/
25C320 (25XX320
*
) are 32 Kbit serial Electrically
Erasable PROMs. The memory is accessed via a
simple Serial Peripheral Interface™ (SPI™)
compatible serial bus. The bus signals required are a
clock input (SCK) plus separate data in (SI) and data
out (SO) lines. Access to the device is controlled
through a Chip Select (CS) input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused,
transitions on its inputs will be ignored, with the
exception of Chip Select, allowing the host to service
higher priority interrupts.
Features
• Low-power CMOS technology
- Write current: 3 mA maximum
- Read current: 500
µA
typical
- Standby current: 500 nA typical
• 4096 x 8 bit organization
• 32 byte page
• Write cycle time: 5 ms maximum
• Self-timed ERASE and WRITE cycles
• Block write protection
- Protect none, 1/4, 1/2 or all of array
• Built-in write protection
- Power on/off data protection circuitry
- Write enable latch
- Write-protect pin
• Sequential read
• High reliability
- Endurance: 100K E/W cycles
- Data retention: > 200 years
- ESD protection: > 4000V
• 8-pin PDIP, SOIC and TSSOP packages
• 14-lead TSSOP package
• Temperature ranges supported:
- Industrial (I):
-40°C to +85°C
- Automotive (E):
-40°C to +125°C
Block Diagram
Status
Register
HV Generator
I/O Control
Logic
Memory
Control
Logic
EEPROM
Array
XDEC
Page
Latches
SI
SO
CS
SCK
HOLD
WP
V
CC
V
SS
Sense Amp.
R/W Control
Y Decoder
Package Types
PDIP, SOIC
CS
SO
WP
V
SS
1
8
V
CC
HOLD
SCK
SI
HOLD
V
CC
CS
SO
1
TSSOP
8
SCK
SI
V
SS
WP
CS
SO
NC
NC
NC
WP
V
SS
1
2
3
4
5
6
7
TSSOP
14
13
12
11
10
9
8
V
CC
HOLD
NC
NC
NC
SCK
SI
25AA320/
25AA320/
25AA320/
2
3
4
7
6
5
2
3
4
7
6
5
*25XX320 is used in this document as a generic part number for the 25AA320/25LC320/25C320 devices.
SPI is a trademark of Motorola Corporation.
2003 Microchip Technology Inc.
DS21227D-page 1

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