SN74AUC1G00DCKR datasheet, PDF

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SN74AUC1G00DCKR: DescriptionSingle 2-Input Positive-NAND Gate 5-SC70 -40 to 85; Categorylogic logic; File Size1MB，24 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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SN74AUC1G00DCKR Overview

Single 2-Input Positive-NAND Gate 5-SC70 -40 to 85

SN74AUC1G00DCKR Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	SC-70, 5 PIN
Contacts	5
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	1 week
Samacsys Confidence	3
Samacsys Status	Released
Samacsys PartID	2367
Samacsys Pin Count	5
Samacsys Part Category	Integrated Circuit
Samacsys Package Category	SOT23 (5-Pin)
Samacsys Footprint Name	DCK(R-PDSO-G5)
Samacsys Released Date	2015-04-16 09:48:08
Is Samacsys	N
series	AUC
JESD-30 code	R-PDSO-G5
JESD-609 code	e4
length	2 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	NAND GATE
MaximumI(ol)	0.009 A
Humidity sensitivity level	1
Number of functions	1
Number of entries	2
Number of terminals	5
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP5/6,.08
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	1.2/2.5 V
Maximum supply current (ICC)	0.01 mA
Prop。Delay @ Nom-Sup	3.2 ns
propagation delay (tpd)	3.2 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	1.25 mm
Base Number Matches	1

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Description	Single 2-Input Positive-NAND Gate 5-SC70 -40 to 85	NAND Gate 1-Element 2-IN CMOS 5-Pin SOT-23 T/R	Single 2-Input Positive-NAND Gate 5-SC70 -40 to 85	Single 2-Input Positive-NAND Gate 5-SC70 -40 to 85	Single 2-Input Positive-NAND Gate 5-SOT-5X3 -40 to 85	Single 2-Input Positive-NAND Gate 5-DSBGA -40 to 85	IC GATE NAND 1CH 2-INP 5DSBGA
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to	incompatible
Maker	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Parts packaging code	SOIC	SOT-23	SOIC	SOIC	SOT	BGA	BGA
package instruction	SC-70, 5 PIN	SOT-23, 5 PIN	SC-70, 5 PIN	SC-70, 5 PIN	SOT-553, 5 PIN	DSBGA-5	DSBGA-5
Contacts	5	5	5	5	5	5	5
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	not_compliant
Is Samacsys	N	N	N	N	N	N	N
series	AUC	AUC	AUC	AUC	AUC	AUC	AUC
JESD-30 code	R-PDSO-G5	R-PDSO-G5	R-PDSO-G5	R-PDSO-G5	R-PDSO-F5	R-XBGA-B5	R-XBGA-B5
length	2 mm	2.9 mm	2 mm	2 mm	1.6 mm	1.4 mm	1.4 mm
Logic integrated circuit type	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE	NAND GATE
MaximumI(ol)	0.009 A	0.009 A	0.009 A	0.005 A	0.009 A	0.009 A	0.005 A
Number of functions	1	1	1	1	1	1	1
Number of entries	2	2	2	2	2	2	2
Number of terminals	5	5	5	5	5	5	5
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	UNSPECIFIED	UNSPECIFIED
encapsulated code	TSSOP	LSSOP	TSSOP	TSSOP	VSOF	VFBGA	VFBGA
Encapsulate equivalent code	TSSOP5/6,.08	TSOP5/6,.11,37	TSSOP5/6,.08	TSSOP5/6,.08	FL6,.047,20	BGA5,2X3,20	BGA5,2X3,20
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, LOW PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
method of packing	TR	TR	TR	TR	TR	TR	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260	NOT SPECIFIED
power supply	1.2/2.5 V	1.2/2.5 V	1.2/2.5 V	1.2/2.5 V	1.2/2.5 V	1.2/2.5 V	1.2/2.5 V
propagation delay (tpd)	3.2 ns	3.2 ns	3.2 ns	3.2 ns	3.2 ns	3.2 ns	3.2 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Schmitt trigger	NO	NO	NO	NO	NO	NO	NO
Maximum seat height	1.1 mm	1.45 mm	1.1 mm	1.1 mm	0.6 mm	0.5 mm	0.5 mm
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V	0.8 V	0.8 V	0.8 V	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
surface mount	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	FLAT	BALL	BALL
Terminal pitch	0.65 mm	0.95 mm	0.65 mm	0.65 mm	0.5 mm	0.5 mm	0.5 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	1.25 mm	1.6 mm	1.25 mm	1.25 mm	1.2 mm	0.9 mm	0.9 mm
Base Number Matches	1	1	1	1	1	1	1
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	-
Is it lead-free?	Lead free	Lead free	Lead free	-	Lead free	Lead free	-
ECCN code	EAR99	EAR99	EAR99	-	EAR99	EAR99	-
Factory Lead Time	1 week	1 week	6 weeks	-	1 week	1 week	1 week
JESD-609 code	e4	e4	e4	e4	e4	e1	-
Load capacitance (CL)	15 pF	15 pF	15 pF	-	15 pF	15 pF	-
Humidity sensitivity level	1	1	1	1	1	1	-
Maximum supply current (ICC)	0.01 mA	0.01 mA	0.01 mA	-	0.01 mA	0.01 mA	-
Prop。Delay @ Nom-Sup	3.2 ns	3.2 ns	3.2 ns	-	3.2 ns	3.2 ns	-
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Tin/Silver/Copper (Sn/Ag/Cu)	-

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