WE-CPU-32100-18N datasheet, PDF

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Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> WE-CPU-32100-18N

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WE-CPU-32100-18N: DescriptionRISC Microprocessor, 32-Bit, 18MHz, CMOS, CPGA132; CategoryThe embedded processor and controller Microcontrollers and processors; File Size4MB，63 Pages; ManufacturerLSC/CSI; Websitehttps://lsicsi.com

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WE-CPU-32100-18N Overview

RISC Microprocessor, 32-Bit, 18MHz, CMOS, CPGA132

WE-CPU-32100-18N Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LSC/CSI
package instruction	PGA, PGA132,11X21MOD
Reach Compliance Code	unknown
bit size	32
JESD-30 code	R-XPGA-P132
JESD-609 code	e0
Number of terminals	132
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC
encapsulated code	PGA
Encapsulate equivalent code	PGA132,11X21MOD
Package shape	RECTANGULAR
Package form	GRID ARRAY
power supply	5 V
Certification status	Not Qualified
speed	18 MHz
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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WE-CPU-32100-18N Related Products

	WE-CPU-32100-18N	WE-CPU-32100-10N	WE-CPU-32100-10R	WE-CPU-32100-14R	WE-CPU-32100-18R
Description	RISC Microprocessor, 32-Bit, 18MHz, CMOS, CPGA132	RISC Microprocessor, 32-Bit, 10MHz, CMOS, CPGA132	RISC Microprocessor, 32-Bit, 10MHz, CMOS, CPGA125	RISC Microprocessor, 32-Bit, 14MHz, CMOS, CPGA125	RISC Microprocessor, 32-Bit, 18MHz, CMOS, CPGA125
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	LSC/CSI	LSC/CSI	LSC/CSI	LSC/CSI	LSC/CSI
package instruction	PGA, PGA132,11X21MOD	PGA, PGA132,11X21MOD	PGA, PGA125,13X13	PGA, PGA125,13X13	PGA, PGA125,13X13
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
bit size	32	32	32	32	32
JESD-30 code	R-XPGA-P132	R-XPGA-P132	S-XPGA-P125	S-XPGA-P125	S-XPGA-P125
JESD-609 code	e0	e0	e0	e0	e0
Number of terminals	132	132	125	125	125
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C
Package body material	CERAMIC	CERAMIC	CERAMIC	CERAMIC	CERAMIC
encapsulated code	PGA	PGA	PGA	PGA	PGA
Encapsulate equivalent code	PGA132,11X21MOD	PGA132,11X21MOD	PGA125,13X13	PGA125,13X13	PGA125,13X13
Package shape	RECTANGULAR	RECTANGULAR	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
power supply	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
speed	18 MHz	10 MHz	10 MHz	14 MHz	18 MHz
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V
surface mount	NO	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC

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