530UA1402M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 530UA1402M00DG

530UA1402M00DG: DescriptionCMOS/TTL Output Clock Oscillator, 1402MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530UA1402M00DG Overview

CMOS/TTL Output Clock Oscillator, 1402MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530UA1402M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1402 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Power amplifier circuit without output transformer (OTL circuit)

Loeyer basic circuit

Probe circuit

FET humidity and temperature dual-function sensor test circuit

Contact sensor signal sending circuit

Auto-decompression starting

DIY modified bus card PCB circuit board global limited exclusive customized version: [i=s] This post was last edited by Peng Binghao on 2019-5-7 20:51 [/i] DIY modified bus card sequence: Have you ever found that when you go to work in Shenzhen, especially during the morning rush hour...; 彭丙浩 DIY/Open Source Hardware

Interrupt-driven multitasking --- a software design structure under the microcontroller (MCU): http://blog.eeworld.net/Akron/archive/2008/08/01/2755643.aspx Due to the limitation of internal resources, the software design of MCU has its own particularity. The program generally does not have com...; welkinjiao Embedded System

[Samples] +TI Industrial Battery Monitoring Product BQ76940 Sample Application: [i=s]This post was last edited by Study_Stellaris on 2014-8-20 18:45[/i] It was the last day of the event, and I just saw this great event. Anyway, I decided to participate. I happen to be working on ...; Study_Stellaris TI Technology Forum

【R7F0C809】Driver 74hc595: I bought a digital tube module online, which is driven by two 74hc595 cascades. The schematic diagram of the module is as follows,The attachment is the project....; wwwming0329 Renesas Electronics MCUs

How to write a global variable to a fixed location in FLASH?: I am going to define a global variable with the content "1234567890" and put it at a certain address of FLASH, such as 0x1b00. I hope that after the program is compiled and the generated hex file is c...; wwbinghai Embedded System

Let's talk about exchanging idle items for chip coins: [font=微软雅黑][size=3] Since [/size][/font][url=https://bbs.eeworld.com.cn/thread-377423-1-1.html][font=微软雅黑][size=3][b]EEWORLD Forum Idle Items Exchange Chip Coin Rules[/b][/size][/font][/url][font=微软雅黑...; eric_wang Buy&Sell

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components