RD38F1030W0ZBQ0 datasheet, PDF

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RD38F1030W0ZBQ0: DescriptionMemory Circuit, Flash+PSRAM, Hybrid, PBGA88,; Categorystorage storage; File Size652KB，46 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/

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RD38F1030W0ZBQ0 Overview

Memory Circuit, Flash+PSRAM, Hybrid, PBGA88,

RD38F1030W0ZBQ0 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Micron Technology
package instruction	FBGA, BGA88,8X12,32
Reach Compliance Code	unknown
JESD-30 code	R-PBGA-B88
Memory IC Type	MEMORY CIRCUIT
Mixed memory types	FLASH+PSRAM
Number of terminals	88
Maximum operating temperature	85 °C
Minimum operating temperature	-25 °C
Package body material	PLASTIC/EPOXY
encapsulated code	FBGA
Encapsulate equivalent code	BGA88,8X12,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, FINE PITCH
power supply	1.8,3 V
Certification status	Not Qualified
Maximum standby current	0.000005 A
Maximum slew rate	0.055 mA
surface mount	YES
technology	HYBRID
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM

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Numonyx™ Wireless Flash Memory

(W18/W30 SCSP)

32WQ and 64WQ Family with Asynchronous RAM

Datasheet

Product Features

Device Architecture

— Flash Density: 32-Mbit, 64-Mbit

— Async PSRAM Density: 16-Mbit, 32-Mbit

— Top, Bottom or Dual flash parameter

configuration

Device Voltage

— Flash VCC = 1.8 V; Flash VCCQ = 1.8 V or 3.0 V

— RAM VCC = 1.8 V or 3.0 V

Device Packaging

— 88 balls (8 x 10 active ball matrix)

— Area: 8x10 mm

— Height: 1.2 mm to 1.4 mm

PSRAM Performance

— 70 ns initial access, 25 ns async page reads at

1.8 V I/O

— 70 ns initial access async PSRAM at 1.8 V

I/O

— 70 ns initial access, 25 ns async page

reads at 3.0 V I/O

SRAM Performance

— 70 ns initial access at 1.8 V or 3.0 V I/O

Quality and Reliability

— Extended Temperature: –25 °C to +85 °C

— Minimum 100K flash block erase cycle

— 90 nm ETOX™ IX flash technology

— 130 nm ETOX™ VIII flash technology

Flash Performance

— 65 ns initial access at 1.8 V I/O

— 70 ns initial access at 3.0 V I/O

— 25 ns async page at 1.8 V or 3.0 V I/O

— 14 ns sync reads (t

CHQV

) at 1.8 V I/O

— 20 ns sync reads (t

CHQV

) at 3.0 V I/O

— Enhanced Factory Programming:

3.10 µs/Word (Typ)

Flash Architecture

— Read-While-Write/Erase

— Asymmetrical blocking structure

— 4-KWord parameter blocks (Top or

Bottom)

— 32-KWord main blocks

— 4-Mbit partition size

— 128-bit One-Time Programmable

(OTP) Protection Register

— Zero-latency block locking

— Absolute write protection with block

lock using F-VPP and F-WP#

Flash Software

— Numonyx™ Flash Data Integrator

(FDI) and Common Flash Interface

(CFI)

Order Number: 251407-13

November 2007

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND

CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED

WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A

PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx

products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

LL egal Lines and Disclaim ers

Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.

Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented

subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or

otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting

Numonyx's website at

http://www.numonyx.com.

Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.

*Other names and brands may be claimed as the property of others.

Datasheet

November 2007

Order Number: 251407-13

32WQ and 64WQ Family with Asynchronous RAM

Contents

1.0

Introduction

.............................................................................................................. 6

1.1

Nomenclature ..................................................................................................... 6

1.2

Conventions ....................................................................................................... 7

Functional Overview

.................................................................................................. 8

2.1

Block Diagram .................................................................................................... 8

2.2

Flash Memory Map and Partitioning........................................................................ 9

Package Information

............................................................................................... 10

Ballout and Signal Description

................................................................................. 13

4.1

Signal Ballout ................................................................................................... 13

4.2

Signal Descriptions ............................................................................................ 14

Maximum Ratings and Operating Conditions............................................................

5.1

Absolute Maximum Ratings................................................................................. 16

5.2

Operating Conditions ......................................................................................... 16

5.3

Capacitance...................................................................................................... 17

Electrical Specifications

........................................................................................... 18

6.1

DC Characteristics ............................................................................................. 18

AC Characteristics

................................................................................................... 20

7.1

Flash AC Characteristics ..................................................................................... 20

7.2

SRAM AC Characteristics .................................................................................... 20

7.3

PSRAM AC Characteristics................................................................................... 22

7.4

Device AC Test Conditions .................................................................................. 27

Flash Power Consumption

....................................................................................... 28

Device Operation

..................................................................................................... 29

9.1

Bus Operations ................................................................................................. 29

2.0

3.0

4.0

5.0

6.0

7.0

8.0

9.0

10.0 Flash Command Definitions

..................................................................................... 33

11.0 Flash Read Operations.............................................................................................

12.0 Flash Program Operations

....................................................................................... 33

13.0 Flash Erase Operations

............................................................................................ 33

14.0 Flash Security Modes

............................................................................................... 33

15.0 Flash Read Configuration Register

........................................................................... 33

16.0 SRAM Operations.....................................................................................................

16.1 Power-up Sequence and Initialization ................................................................... 34

16.2 Data Retention Mode ......................................................................................... 34

17.0 PSRAM Operations...................................................................................................

17.1 Power-Up Sequence and Initialization................................................................... 36

17.1.1 16Mbit PSRAM Power-Up Sequence (Non-Page Mode).................................. 36

17.2 Standby Mode/ Deep Power-Down Mode............................................................... 37

17.3 PSRAM Special Read and Write Constraints ........................................................... 37

Write State Machine

................................................................................................ 38

Common Flash Interface..........................................................................................

Flash Flowcharts

..................................................................................................... 38

Additional Information

............................................................................................ 38

November 2007

Order Number: 251407-13

Datasheet

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