E
n
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n
PRELIMINARY
BYTE-WIDE
SmartVoltage FlashFile™ MEMORY FAMILY
4, 8, AND 16 MBIT
28F004SC, 28F008SC, 28F016SC
Includes Commercial and Extended Temperature Specifications
SmartVoltage Technology
2.7 V (Read-Only), 3.3 V or 5 V V
CC
and 3.3 V, 5 V, or 12 V V
PP
High-Performance
4, 8 Mbit 85 ns Read Access Time
16 Mbit 95 ns Read Access Time
Enhanced Data Protection Features
Absolute Protection with V
PP
= GND
Flexible Block Locking
Block Write Lockout during Power
Transitions
Enhanced Automated Suspend Options
Program Suspend to Read
Block Erase Suspend to Program
Block Erase Suspend to Read
Industry-Standard Packaging
40-Lead TSOP, 44-Lead PSOP
and 40 Bump
µBGA*
CSP
n
n
n
n
n
n
High-Density 64-Kbyte Symmetrical
Erase Block Architecture
4 Mbit: Eight Blocks
8 Mbit: Sixteen Blocks
16 Mbit: Thirty-Two Blocks
Extended Cycling Capability
100,000 Block Erase Cycles
Low Power Management
Deep Power-Down Mode
Automatic Power Savings Mode
Decreases I
CC
in Static Mode
Automated Program and Block Erase
Command User Interface
Status Register
SRAM-Compatible Write Interface
ETOX™ V Nonvolatile Flash
Technology
n
n
Intel’s byte-wide SmartVoltage FlashFile™ memory family renders a variety of density offerings in the same
package. The 4-, 8-, and 16-Mbit byte-wide FlashFile memories provide high-density, low-cost, nonvolatile,
read/write storage solutions for a wide range of applications. Their symmetrically-blocked architecture, flexible
voltage, and extended cycling provide highly flexible components suitable for resident flash arrays, SIMMs,
and memory cards. Enhanced suspend capabilities provide an ideal solution for code or data storage
applications. For secure code storage applications, such as networking, where code is either directly
executed out of flash or downloaded to DRAM, the 4-, 8-, and 16-Mbit FlashFile memories offer three levels
of protection: absolute protection with V
PP
at GND, selective hardware block locking, or flexible software
block locking. These alternatives give designers ultimate control of their code security needs.
This family of products is manufactured on Intel’s 0.4
µm
ETOX™ V process technology. They come in
industry-standard packages: the 40-lead TSOP, ideal for board-constrained applications, and the rugged
44-lead PSOP. Based on the 28F008SA architecture, the byte-wide SmartVoltage FlashFile memory family
enables quick and easy upgrades for designs that demand state-of-the-art technology.
December 1997
Order Number: 290600-003
Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of
Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to
sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or
infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life
saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
The 28F004SC, 28F008SC, 28F016SC may contain design defects or errors known as errata. Current characterized errata are
available on request.
*Third-party brands and names are the property of their respective owners.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call 1-800-548-4725
or visit Intel’s Website at http://www.intel.com
COPYRIGHT © INTEL CORPORATION 1996, 1997
CG-041493
E
BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
CONTENTS
PAGE
PAGE
6.0 ELECTRICAL SPECIFICATIONS..................30
6.1 Absolute Maximum Ratings ........................30
6.2 Commercial Temperature Operating
Conditions .................................................30
6.3 Capacitance ...............................................30
6.4 DC Characteristics—Commercial
Temperature..............................................31
6.5 AC Characteristics—Read-Only
Operations—Commercial Temperature .....35
6.6 AC Characteristics—Write Operations—
Commercial Temperature..........................37
6.7 Block Erase, Program, and Lock-Bit
Configuration Performance—Commercial
Temperature..............................................39
6.8 Extended Temperature Operating
Conditions .................................................40
6.9 DC Characteristics—Extended
Temperature..............................................40
6.10 AC Characteristics—Read-Only Operations
— Extended Temperature .........................40
7.0 ORDERING INFORMATION..........................41
8.0 ADDITIONAL INFORMATION .......................42
1.0 INTRODUCTION .............................................5
1.1 New Features...............................................5
1.2 Product Overview.........................................5
1.3 Pinout and Pin Description ...........................6
2.0 PRINCIPLES OF OPERATION .....................12
2.1 Data Protection ..........................................13
3.0 BUS OPERATION .........................................13
3.1 Read ..........................................................13
3.2 Output Disable ...........................................13
3.3 Standby......................................................13
3.4 Deep Power-Down .....................................13
3.5 Read Identifier Codes Operation ................14
3.6 Write ..........................................................14
4.0 COMMAND DEFINITIONS ............................14
4.1 Read Array Command................................17
4.2 Read Identifier Codes Command ...............17
4.3 Read Status Register Command................17
4.4 Clear Status Register Command................17
4.5 Block Erase Command ..............................17
4.6 Program Command....................................18
4.7 Block Erase Suspend Command................18
4.8 Program Suspend Command .....................19
4.9 Set Block and Master Lock-Bit Commands 19
4.10 Clear Block Lock-Bits Command..............20
5.0 DESIGN CONSIDERATIONS ........................28
5.1 Three-Line Output Control..........................28
5.2 RY/BY# Hardware Detection ......................28
5.3 Power Supply Decoupling ..........................28
5.4 V
PP
Trace on Printed Circuit Boards...........28
5.5 V
CC
, V
PP
, RP# Transitions .........................28
5.6 Power-Up/Down Protection ........................28
5.7 V
PP
Program and Erase Voltages on Sub-
0.4µ SC Memory Family............................29
PRELIMINARY
3
BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
E
REVISION HISTORY
Number
-001
-002
Original version
Table 3 revised to reflect change in abbreviations from “W” for write to “P” for program.
Ordering information graphic (Appendix A) corrected: from PB = Ext. Temp. 44-Lead
PSOP to
TB
= Ext. Temp. 44-Lead PSOP.
Corrected nomenclature table (Appendix A) to reflect actual Operating Temperature/
Package information
Updated Ordering Information and table
Correction to table, Section 6.2.3. Under I
LO
Test Conditions, previously read V
IN
= V
CC
or GND, corrected to V
OUT
= V
CC
or GND
Section 6.2.7, modified Program and Block Erase Suspend Latency Times
Added
µBGA*
CSP pinout and corrected error in PSOP pinout.
Added Design Consideration for V
PP
Program and Erase Voltages on future sub-0.4µ
devices.
Description
-003
4
PRELIMINARY
E
1.0
1.1
BYTE-WIDE SmartVoltage FlashFile™ MEMORY FAMILY
INTRODUCTION
1.2
Product Overview
This datasheet contains 4-, 8-, and 16-Mbit
SmartVoltage FlashFile memory specifications.
Section 1.0 provides a flash memory overview.
Sections 2.0, through 5.0 describe the memory
organization and functionality. Section 6.0 covers
electrical specifications for commercial and
extended temperature product offerings. Section
7.0 contains ordering information. Finally, the byte-
wide SmartVoltage FlashFile memory family
documentation also includes application notes and
design tools which are referenced in Section 8.0.
The byte-wide SmartVoltage FlashFile memory
family provides density upgrades with pinout
compatibility for the 4-, 8-, and 16-Mbit densities.
The 28F004SC, 28F008SC, and 28F016SC are
high-performance
memories
arranged
as
512 Kbyte, 1 Mbyte, and 2 Mbyte of 8 bits. This
data is grouped in eight, sixteen, and thirty-two
64-Kbyte blocks which are individually erasable,
lockable, and unlockable in-system. Figure 4
illustrates the memory organization.
SmartVoltage technology enables fast factory
programming and low-power designs. These
components support read operations at 2.7 V (read-
only), 3.3 V, and 5 V V
CC
and block erase and
program operations at 3.3 V, 5 V, and 12 V V
PP
.
The 12 V V
PP
option renders the fastest program
and erase performance which will increase your
factory throughput. With the 3.3 V and 5 V V
PP
option, V
CC
and V
PP
can be tied together for a
simple and voltage flexible design. This voltage
flexibility is key for removable media that need to
operate in a 3 V to 5 V system. In addition, the
dedicated V
PP
pin gives complete data protection
when V
PP
≤
V
PPLK
.
Table 1. SmartVoltage Flash
V
CC
and V
PP
Voltage Combinations
V
CC
Voltage
2.7 V
(1)
3.3 V
5V
V
PP
Voltage
3.3 V, 5 V, 12 V
5 V, 12 V
New Features
The byte-wide SmartVoltage FlashFile memory
family maintains backwards-compatibility with
Intel’s
28F008SA
and
28F008SA-L.
Key
enhancements include:
•
•
•
SmartVoltage Technology
Enhanced Suspend Capabilities
In-System Block Locking
They share a compatible status register, software
commands, and pinouts. These similarities enable
a clean upgrade from the 28F008SA and
28F008SA-L to byte-wide SmartVoltage FlashFile
products. When upgrading, it is important to note
the following differences:
•
Because of new feature and density options,
the devices have different device identifier
codes. This allows for software optimization.
V
PPLK
has been lowered from 6.5 V to 1.5 V to
support low V
PP
voltages during block erase,
program, and lock-bit configuration operations.
Designs that switch V
PP
off during read
operations should transition V
PP
to GND.
To take advantage of SmartVoltage tech-
nology, allow V
PP
connection to 3.3 V or 5 V.
•
NOTE:
1. Block erase, program, and lock-bit configuration
operation with V
CC
, 3.0 V are not supported.
•
Internal V
CC
and V
PP
detection circuitry
automatically configures the device for optimum
performance.
A Command User Interface (CUI) serves as the
interface between the system processor and
internal operation of the device. A valid command
sequence written to the CUI initiates device
automation. An internal Write State Machine (WSM)
automatically executes the algorithms and timings
necessary for block erase, program, and lock-bit
configuration operations.
For more details see application note
AP-625,
28F008SC Compatibility with 28F008SA
(order
number 292180)
.
PRELIMINARY
5
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