PC8280MTPUDA datasheet, PDF - EEWORLD Datasheet

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PC8280MTPUDA: DescriptionMicro Peripheral IC,; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，64 Pages; Manufacturere2v technologies

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PC8280MTPUDA Overview

Micro Peripheral IC,

PC8280MTPUDA Parametric

Parameter Name	Attribute value
package instruction	,
Reach Compliance Code	compli
Base Number Matches	1

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PC8280/PC8270 Power QUICC II

Integrated Communication Processors

Datasheet -

Preliminary Specification

Features

PC603e Microprocessor (Embedded PowerPC

Core) at 166-450 MHz

603e Core with 16K Inst and 16K Data Caches

64-bit 60x Bus, 32-bit Local/PCI Bus

128K ROM, 32K IRAM, 32K DPRAM

Three FCCs Supporting ATM, 10/100 Ethernet or HDLC

256 HDLC Channels, 8 TDMs

4 SCCs, 2 SMCs, SPI, I2C

Memory Controller Built from SDRAM, UPM, GPCM Machines

New Features - USB, RMII, UTOPIA Improvements

Performance

– 400 MHz CPU, 250 MHz CPM, 83 MHz Bus

– Less than 2W at Full Performance, 1.5V

•

Technology

– 3.3V I/O, 1.5V Core

– 480 TBGA, 37.5 × 37.5 mm, 1.27 mm Ball Pitch

•

Description

This document contains detailed information about power considerations, DC/AC electrical characteristics, and AC timing

specifications for 130 nm members of the PowerQUICC II

™

family of integrated communications processors: the PC8280

and the PC8270 (collectively called 'the PC8280' throughout this document).

Screening/Quality/Packaging

This product is manufactured in full compliance with:

•

Upscreening Based Upon e2v Standards

•

Military Temperature Range (T

case

= -55°C, T

= +125°C)

•

480-ball Tape Ball Grid Array Package (TBGA 37.5 × 37.5 mm)

Visit our website: www.e2v.com

for the latest version of the datasheet

e2v semiconductors SAS 2008

0836E–HIREL–04/08

PC8280/PC8270 [Preliminary]

Hot-swap friendly (supports the hot swap specification as defined by PICMG 2.1 R1.0 August 3,

1998)

Support for 66.67/83.33/100 MHz, 3.3V specification

60x-PCI bus core logic that uses a buffer pool to allocate buffers for each port

Uses the local bus signals, removing need for additional pins

• System Interface Unit (SIU)

Clock synthesizer

Reset controller

Real-time clock (RTC) register

Periodic interrupt timer

Hardware bus monitor and software watchdog timer

IEEE

1149.1 JTAG test access port

• 12-bank memory controller

Glueless interface to SRAM, page mode SDRAM, DRAM, EPROM, Flash and other user- definable

peripherals

Byte write enables and selectable parity generation

32-bit address decodes with programmable bank size

Three user-programmable machines, general-purpose chip-select machine, and page-mode pipe-

line SDRAM machine

Byte selects for 64-bus width (60x) and byte selects for 32-bus width (local)

Dedicated interface logic for SDRAM

• CPU core can be disabled and the device can be used in slave mode to an external core

• Communications Processor Module (CPM)

Embedded 32-bit communications processor (CP) uses a RISC architecture for flexible support for

communications protocols

Interfaces to G2_LE core through an on-chip 32-Kbyte dual-port data RAM, an on-chip 32-Kbyte

dual-port instruction RAM and DMA controller

Serial DMA channels for receive and transmit on all serial channels

Parallel I/O registers with open-drain and interrupt capability

Virtual DMA functionality executing memory-to-memory and memory-to-I/O transfers

Three fast communications controllers supporting the following protocols:

– 10/100-Mbit Ethernet/IEEE 802.3 CDMA/CS interface through media independent interface

(MII) or reduced media independent interface (RMII)

– ATM: Full-duplex SAR protocols at 155 Mbps, through UTOPIA interface, AAL5, AAL1, AAL0

protocols, TM 4.0 CBR, VBR, UBR, ABR traffic types, up to 64 K external connections (no

ATM support for the PC8270)

– Transparent

0836E–HIREL–04/08

e2v semiconductors SAS 2008

PC8280MTPUDA Related Products

	PC8280MTPUDA	PC8280MTPUQA	PC8280MTPULA	PCX8270MTPUQLDA	PC8280MTPUQLDA	PCX8280MTPUQLDA	PC8270MTPUQLDA
Description	Micro Peripheral IC,	Micro Peripheral IC,	Micro Peripheral IC,	RISC Microprocessor, 32-Bit, 333MHz, CMOS, PBGA480, 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480	RISC Microprocessor, 32-Bit, 333MHz, CMOS, PBGA480, 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480	RISC Microprocessor, 32-Bit, 333MHz, CMOS, PBGA480, 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480	RISC Microprocessor, 32-Bit, 333MHz, CMOS, PBGA480, 37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480
package instruction	,	,	,	LBGA,	37.50 X 37.50 MM, 1.55 MM HEIGHT, 1.27 MM PITCH, TBGA-480	LBGA,	LBGA,
Reach Compliance Code	compli	compli	compli	compliant	compliant	compliant	compliant
Base Number Matches	1	1	1	1	-	-	-
Parts packaging code	-	-	-	BGA	BGA	BGA	BGA
Contacts	-	-	-	480	480	480	480
ECCN code	-	-	-	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C	3A001.A.2.C
Other features	-	-	-	ALSO REQUIRES 3.3V SUPPLY	ALSO REQUIRES 3.3V SUPPLY	ALSO REQUIRES 3.3V SUPPLY	ALSO REQUIRES 3.3V SUPPLY
Address bus width	-	-	-	32	32	32	32
bit size	-	-	-	32	32	32	32
boundary scan	-	-	-	YES	YES	YES	YES
maximum clock frequency	-	-	-	83.33 MHz	83.33 MHz	83.33 MHz	83.33 MHz
External data bus width	-	-	-	64	64	64	64
Format	-	-	-	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT
Integrated cache	-	-	-	YES	YES	YES	YES
JESD-30 code	-	-	-	S-PBGA-B480	S-PBGA-B480	S-PBGA-B480	S-PBGA-B480
length	-	-	-	37.5 mm	37.5 mm	37.5 mm	37.5 mm
low power mode	-	-	-	NO	NO	NO	NO
Number of terminals	-	-	-	480	480	480	480
Maximum operating temperature	-	-	-	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-	-	-	-55 °C	-55 °C	-55 °C	-55 °C
Package body material	-	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	-	-	LBGA	LBGA	LBGA	LBGA
Package shape	-	-	-	SQUARE	SQUARE	SQUARE	SQUARE
Package form	-	-	-	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE
Certification status	-	-	-	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	-	-	-	1.65 mm	1.65 mm	1.65 mm	1.65 mm
speed	-	-	-	333 MHz	333 MHz	333 MHz	333 MHz
Maximum supply voltage	-	-	-	1.6 V	1.6 V	1.6 V	1.6 V
Minimum supply voltage	-	-	-	1.45 V	1.45 V	1.45 V	1.45 V
Nominal supply voltage	-	-	-	1.5 V	1.5 V	1.5 V	1.5 V
surface mount	-	-	-	YES	YES	YES	YES
technology	-	-	-	CMOS	CMOS	CMOS	CMOS
Temperature level	-	-	-	MILITARY	MILITARY	MILITARY	MILITARY
Terminal form	-	-	-	BALL	BALL	BALL	BALL
Terminal pitch	-	-	-	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	-	-	-	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	-	-	-	37.5 mm	37.5 mm	37.5 mm	37.5 mm
uPs/uCs/peripheral integrated circuit type	-	-	-	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC

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