Voltage Controlled Crystal Oscillators (VCXO’s)
J-Type CMOS Output Option
Description:
The J-Type CMOS output option
is a high reliability CMOS VCXO, ASIC based and
available in a 6 or 4 pin J-Lead ceramic package.
Features:
• Output Frequencies from 1.024 MHz to 77.76 MHz
• 3.3 or 5.0 volt options
• Small 14mm x 9mm J-Lead Package
• Low phase noise and custom options
• 0/70°C or –40/85°C operating temperature
• Tri-state output (CMOS)
Performance Characteristics
Parameter
Center Frequency,
see ordering information
Supply Voltage , +5.0 volt option
+3.3 volt option
1
Symbol
f
o
Minimum
1.024
4.5
3.0
Typical
Maximum
77.760
Unit
MHz
Vdc
Vdc
V
V
5.0
3.3
5.5
3.6
7
Maximum Supply Voltage
Supply Current (frequency dependent)
Output Level High
Output Level Low
Output Rise and Fall Time
Symmetry (Duty Cycle )
2
10 mA +0.25 mA per MHz, typical
V
OH
V
OL
tR/tF
SYM
T
OP
0.8*Vcc
-
-
45/55 or 40/60
0/70, -40/85
3
<0.5
APR
±50, ±100
0.1*Vcc
5
V
ns
%
°C
ps
ps
ppm
Operating Temperature, see ordering info
RMS Jitter, Output = 12.0-77.760 MHz
RMS Jitter, Output = 12.0 -77.760 MHz,
Band = 12.0 kHz to 20 MHz
Absolute Pull Range over the operating
temperature range, aging and power supply.
Vc= 0.5 to 4.5 supply or 0.3 to 3.0V at 3.3V
supply.
See ordering information for options
Control Range
Gain Transfer:
(Frequency vs. Control Voltage)
Control Input Leakage
Control Voltage Modulation Bandwidth
Storage Temperature
Soldering Temp./Time
Package Size
0
KV
I
L
BW
T
S
T
LS
-55
-
10
-
-
14 x 9 x 4.5 mm
Positive
V
DD
1
125
220/10
uA
kHz
°C
°C/s
1. Power supply bypass is required and a 0.1uF in parallel with a 0.01uF high frequency capacitor is recommended.
2. Duty cycle is defined as on-time versus period at 1.4V for TTL and 2.5V for CMOS (5 volt supply) and at 1.65 V for CMOS
(3.3 volt operation)
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Web: www.vectron.com
12
Voltage Controlled Crystal Oscillators (VCXO’s)
CMOS Output Option
Outline Drawing
Pad Layout
VCXO
1
6
2
5
3
4
mm
in
Pin Out Information
Pin Symbol Function
1
2
3
4
5
6
Vc
Tri-state
GND
Output
CMOS/TTL
select
V
CC
VCXO Control Voltage.
TTL logic low disables output
TTL logic high, or no connect, enables output
Case and electrical ground.
VCXO Output
TTL logic low optimizes symmetry for CMOS
TTL logic high, or NC, optimizes symmetry for TTL.
Power Supply Voltage (5.0 V or 3.3V ±10%)
Standard Frequencies (MHz)
1.024
3.686
6.144
8.448
14.318
19.44
27.000
38.880
52.000
1.544
4.000
6.176
10.000
15.360
20.000
30.000
40.000
65.536
2.000
4.032
6.312
12.000
15.440
20.480
32.000
40.960
77.760
2.048
4.096
6.400
12.288
16.000
24.000
32.768
44.736
3.088
4.434
8.000
12.352
16.384
24.576
34.368
50.000
3.580
5.000
8.192
13.000
18.432
24.704
35.328
51.840
Ordering Information
J
Package:
6-Pin Ceramic SOJ
Supply Voltage
D
= 3.3 Vdc ±10%
C
= 5.0 Vdc ±10%
Output
U
= VCXO
L
= ±10% Linear VCXO
APR
G
= ±50 ppm
N
= ±80 ppm
H
= ±100 ppm
D
U
G
C
J
T
N
44.736
MHz
Frequency
1.024 - 77.760 MHz
Specials
N
= Standard
Tri-state
T
= Pin 2
Temperature Range
C
= 0 to 70°C
L
= -40 to 85°C
Duty Cycle
A
= TTL/CMOS 45/55%
J
= CMOS 45/55%
K
= CMOS 40/60%
Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • Web: www.vectron.com
13
FPGA/CPLD
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