P1727
Notebook LCD Panel EMI
Reduction IC
Features
•
FCC approved method of EMI attenuation
•
Generates a low EMI spread spectrum of the input
clock frequency
•
Optimized for frequency range: P1727X: 20MHz to
40MHz
•
Internal loop filter minimizes external components
and board space
•
8 different frequency deviations ranging from
±0.625% to –3.50%
•
Low inherent Cycle-to-cycle jitter
•
3.3V Operating Voltage
•
Supports notebook VGA and other LCD timing
controller applications
•
Available in 8-pin SOIC.
system cost savings by reducing the number of circuit
board layers and shielding that are traditionally required
to pass EMI regulations.
The P1727 modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
thereby decreasing the peak amplitudes of its
harmonics. This result in significantly lower system EMI
compared to the typical narrow band signal produced
by oscillators and most clock generators. Lowering EMI
by increasing a signal’s bandwidth is called spread
spectrum clock generation.
The P1727 uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
Applications
The P1727 is targeted towards notebook LCD displays,
other displays using an LVDS interface, PC peripheral
devices and embedded systems.
Product Description
The P1727 is a versatile spread spectrum frequency
modulator designed specifically for a wide range of
clock frequencies. The P1727 reduces electromagnetic
interference (EMI) at the clock source, allowing system
wide reduction of EMI of down stream (clock and data
dependent signals). The P1727 allows significant
Block Diagram
PDB
VDD
Modulation
CLKIN
Frequency
Divider
Feedback
Divider
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
REFOUT
VSS
©2010 SCILLC. All rights reserved.
NOVEMBER
2010 – Rev. 1.1
Publication Order Number:
P1727/D
P1727
Pin Configuration
CLKIN
1
VDD
VSS
8
PDB
P1727
7
NC
2
3
6
NC
5
REFOUT
ModOUT
4
Table 1 – Power Down Selection
PDB
Spread Spectrum
ModOUT
0
1
N/A
ON
Disabled
Normal
PLL
Disabled
Normal
Mode
Power Down
Normal
Table 2 – Frequency Deviation Selection
P/ N
Deviation
P1727A
P1727B
P1727C
P1727D
-1.25%
-1.75%
-2.50%
-3.50%
P/N
P1727E
P1727F
P1727G
P1727H
Deviation
±0.625%
±0.875%
±1.25%
±1.75%
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
CLKIN
VDD
VSS
ModOUT
REFOUT
NC
NC
PDB
Type
I
P
P
O
O
Description
External reference frequency input. Connect to externally generated
reference signal.
Connect to +3.3V.
Ground Connection. Connect to system ground.
Spread Spectrum Clock output.
Reference output.
No connect.
No connect.
I
Powerdown Pin. Pull low to disable spread spectrum clock output.
Rev. 1 | Page 2 of 6 | www.onsemi.com
P1727
Schematic for notebook VGA application
27MHz Pixel Clock input
VDD
0.1 µF
1
CLKIN
CLKIN
2
VDD
3
VSS
PDB
8
NC
7
NC
6
REFOUT
5
Tie low to enable
Powerdown mode.
P1727
ModOut Clock
4
ModOUT
Reference Clock O/P
Absolute Maximum Ratings
Symbol
VDD, V
IN
T
STG
T
s
T
J
T
DV
Storage temperature
Parameter
Rating
-0.5 to +7
-65 to +125
260
150
2
Unit
V
°
C
°
C
°
C
KV
Voltage on any pin with respect to Ground
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Symbol
VDD
T
A
C
L
C
IN
Operating temperature
Load Capacitance
Input Capacitance
Parameter
Min
3.0
-40
Max
3.6
+85
15
7
Unit
V
°
C
pF
pF
Supply Voltage with respect to VSS
Rev. 1 | Page 3 of 6 | www.onsemi.com
P1727
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
I
CC
V
DD
t
ON
Z
OUT
Input Low voltage
Input High voltage
Input Low current
Input High current
Output Low current
Output High current
VDD = 3.3V, I
OL
= 20mA
VDD = 3.3V, I
OH
= 20mA
2.5
2
14
3.0
3.3
0.18
50
18
3.6
Parameter
Min
VSS – 0.3
2.0
Typ
Max
0.8
VDD +0.3
-35
35
0.4
Unit
V
V
µA
µA
V
V
mA
mA
V
mS
Static Supply Current (CLKIN, PDB pulled Low)
Dynamic Supply Current (No Load)
Operating Voltage
Power up time (first locked clock cycle after power up)
Clock Output impedance
AC Electrical Characteristics
Symbol
f
IN
f
OUT
t
LH
t
HL
1
1
Parameter
Input Frequency:
Output Frequency:
Output Rise time
Output Fall time
Jitter (Cycle-to-cycle)
Output Duty cycle
P1727X
P1727X
Measured from 0.8V to 2.0V
Measured from 2.0V to 0.8V
Min
20
20
0.7
0.6
45
Typ
Max
40
40
Unit
MHz
MHz
nS
nS
pS
%
0.9
0.8
225
50
1.1
1.0
325
55
t
JC
t
D
Note: 1. t
LH
and t
HL
are measured with a capacitive load of 15pF.
Rev. 1 | Page 4 of 6 | www.onsemi.com
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