P L L
SCG200 SERIES
SYNCHRONOUS CLOCK GENERATORS
Application:
The Connor-Winfield SCG200 Series provides
high precision phase lock loop frequency translation for
the telecommunication applications.
SCG200 Series is well suited for use in line cards,
service termination cards and similar functions to provide
reliable reference, phase locked, synchronization for
TDM, PDH, SONET and SDH network equipment . The
SCG200 Series provides a jitter filtered, wander
following output signal sychronized to a superior Stratum
or peer input reference signal.
Features:
l
l
l
l
l
3.3V High Precision PLL
Tri-State Capability
Active Alarms
Guaranteed Free Run ±20ppm
Fast Acquisition Time (0.3 sec)
CONNOR
WINFIELD
THE CONNOR-WINFIELD CORP.
2111 COMPREHENSIVE DRIVE.
AURORA, IL 60505.
FAX (630) 851-5040.
PHONE (630) 851-4722
HTTP://WWW.CONWIN.COM
DATA SHEET #:
Specifications subject to change without notice.
SG021
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DATE:
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© Copyright 2000 Connor-Winfield all rights reserved.
General Description
The SCG200 Series provides high precision phase
lock loop frequency translation for the telecommunication
applicationds. The SCG200 products generate a CMOS output
from an intrinsically low jitter, voltage controlled crystal
oscillator. Most models provide a jitter attenuated, internal
reference that is connected to a Reference Output pin.
SCG200 Series is well suited for use in line cards,
service termination cards and similar functions to provide
reliable reference, phase locked, synchronization for TDM,
PDH, SONET and SDH network equipment . The SCG200
Series provides a jitter filtered, wander following output signal
sychronized to a superior Stratum or peer input reference signal.
The SCG200 Series include the following features:
Free Run, Tri-state and alarm outputs for Loss-of-Reference,
(LOR), Loss-of-Lock, (LOL). During the LOR alarm, the
SCG200 will also enter a Free Run state which will guarantee
a 20 ppm accurate output. Additionally the Free Run mode
may be entered manually by asserting a high signal to the Free
Run Enable pin. The outputs may be put into the tri-state high
impedance condition for external testing purposes by asserting
a high signal to the Tri-State Enable pin.
The SCG200 Series are 3.3 Volt components that
typically draw less than 100 mA. All models have a fast
acquisition time of approximately 0.3 seconds and can be used
in applications that require temperature rating of 0° - 70° C.
The SCG200 package dimensions are .775 x .82 x .35 on a
six layer FR4 board with surface mount pins. Parts are
assembled using high temperature solder to withstand surface
mount reflow process.
Functional Block Diagram
Figure 1
LOL
(Pin 7)
LOR
(Pin 6)
Alarm
Detection
Free Run Enable
(Pin 5)
DPFD
Analog
Low Pass
Filter
Reference Input
(Pin 8)
Divider
Free Run
Control
VCXO
Oscillator
Output
(Pin 9)
Divider
Refernce Output
(Pin 1)
Select A
(Pin 14)
Select B
(Pin 13)
Tri-State Enable
(Pin 10)
Tri-State
Buffers
All Outputs
Table 1
M ode l
SC G200
SC G201
SC G202
SC G203
SC G204
SC G205
SC G206
SC G207
SC G208
In p u t
Re f Fr e q .
8-64 kHz
19.44 M Hz
19.44 M Hz
8-64 kHz
8-64 kHz
8-64 kHz
8-64 kHz
19.44 M Hz
19.44 M Hz
M ax
Du ty
C ycle
40/60
40/60
40/60
45/55
40/60
40/60
40/60
40/60
48/52
Model Comparison Table
Re fe r e n ce Ou tp u t
(Pin #1)
= Input Ref Freq.
8 k Hz
19.44 M Hz
= Input Ref Freq.
= Input Ref Freq.
19.44 M Hz
= Input Ref Freq.
51.84 M Hz , 77.76 M Hz
19.44 M Hz
Os cillato r Ou tp u t
(Pin #9)
1.544 MHz to 77.76 MHz
19.44 M Hz
77.76 M Hz
1.544 MHz to 77.76 MHz
1.544 MHz to 77.76 MHz
77.76 M Hz
1.544 MHz to 77.76 MHz
51.84 M Hz , 77.76 M Hz
77.76 M Hz
Re f. Ou tp u t & Os c. Ou tp u t
s yn c’d w ith in 7 n s
Re f. Ou tp u t = Os c. Ou tp u t
Tight Duty Cy c le
Tight Duty Cy c le
33
Ω
o u tp u t s e r ie s r e s is to r
No te s
Bas ic Model
*Features which differentiate a model from the base model (SCG200) are highlighted in boldface color and in the notes column.
CONNOR
WINFIELD
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Table 2
SYMBOL
V
cc
V
i
T
S
PARAMETER
Pow er supply voltage
Input voltage
Storage temperature
ABSOLUTE MAXIMUM RATING
All SCG200 Models
MINIMUM
-0.5
-0.5
-65
NOMINAL
MAXIMUM
4
5.5
150
UNITS
Volts
Volts
deg. C
NOTES
Table 3
PA RA M ET ER
V oltage
Cur r ent
Tempera ture Range
Input Jitter Toler anc e
A c quis ition Time
Cap ture /pull- in r ange
Output Duty Cy c le
Output Ris e A nd Fall Time
Output Load
A larms
Fr ee Ru n A c c urac y
Pac kage
TDEV
MTIE
SPECIFICATIONS
All SCG200 Models
NOT ES
3.3 V ±5%
1 00 mA Max imum
0 to 70 deg. C.
6.25 us , 10 Hz (.05 UI @ 8000 Hz )
A pprox . .3 s e c onds
±40 ppm Min imum
40/60 % Min /Ma x @ 50% Lev el
3 nS @ 20% to 80% output lev el
30 pF
LOR, LOL s tatu s s ig nal outp uts
±20 ppm
Fr 4 S M 0.765 " x 8" x 0 .35 0"
≤
0.4 ns
2 ns Ty pic al
2.0
1.0
Table 4
SYMBOL
V
IH
V
IL
t
IO
C
O
V
HO
V
IO
t
IR
PARAMETER
High level input voltage
Low level input voltage
I/O to output valid
Output capacitance
INPUT AND OUTPUT CHARACTERISTICS
All SCG200 Models
MINIMUM
2
0
NOMINAL
MAXIMUM
5.5
0.8
10
10
2.4
0.4
30
nS
UNITS
V
V
nS
pF
Vcc Minimum
Vcc Maximum
NOTES
High level output voltage Ioh = -4mA
Low level output voltage Io1 = 8mA
Input reference signal pulse w idth
NOTES:
1.0:
2.0:
Requires external regulation.
From a 20 ppm offset in reference frequency.
CONNOR
WINFIELD
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Specifications subject to change without notice.
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TABLE 5
FREQUENCY (M Hz)
1.544
2.048
19.44
20.48
44.736
51.84
77.76
pS (RM S)
10 (Estimated)
10 (Estimated)
9.5 (Typical)
10 (Estimated)
10.5 (Typical)
6.0 (Typical)
7.5 (Typical)
OUTPUT JITTTER SPECIFICATIONS
All SCG200 Models
JITTER BW 10 Hz - 1 M Hz
m UI
0.02 (Estimated)
0.02 (Estimated)
0.19 (Typical)
0.21 (Estimated)
0.47 (Typical)
0.30 (Typical)
0.58 (Typical)
SONET JITTER BW 12 KHz - 20 M Hz
pS (RM S)
2.5 (Estimated)
2.5 (Estimated)
2.3 (Typical)
2.5 (Estimated)
2.3 (Typical)
2.0 (Typical)
2.4 (Typical)
m UI
0.04 (Estimated)
0.05 (Estimated)
0.05 (Typical)
0.05 (Estimated)
0.10 (Typical)
0.10 (Typical)
0.19 (Typical)
NOTES
TABLE 6
TRISTATE
0
1
0
OUTPUT PROGRAMMING
All SCG 200 Models
FREE RUN
0
X
1
OUTPUT
Locked to reference selected (default)
Hi Z Tristate condition
Free Run at nominal frequency
TABLE 7
LOL
OUTPUT
0
1
X
ALARM STATES
All SCG200 Models
LOR
OUTPUT
0
0
1
ALARM
OUTPUT
No alarm
Loss-of-Lock
Loss-of-Reference
Package Dimensions
Figure 2
Figure 3
Recommended Footprint Dimensions
0.800
0.640
0.080
(20.32mm)
(16.26mm)
(2.03mm)
0.050 TYP
(1.27mm)
0.100
(2.54mm)
Pin 1
0.050 TYP
(1.27mm)
0.650
(16.51mm)
CONNOR
WINFIELD
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Specifications subject to change without notice.
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PIN DESCRIPTION
SCG200 Series
PIN #
CONNECTION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Reference Output
TCK
TMS
Ground
Free Run Enable/TDI
Loss of Reference (LOR)
Loss of Lock (LOL)
Reference Input
Oscillator Output
Tri-State Enable
Vcc
TDO
Input Freq. Select B
Input Freq. Select A
DESCRIPTION
-Output frequency is dependent on SCG model.
-JTAG pin that is used only by Connor-Winfield for programming. Do not connect
-JTAG pin that is used only by Connor-Winfield for programming. Do not connect
-Ground.
-Free Run enable pin. 1 = Free Run at nominal frequency ±20ppm. Input is pulled to GND.
-Alarm
indicator. 1 = A reference has been lost.
-Alarm indicator. 1 = Phase lock has been lost
-Input reference frequency.
-Output frequency is dependent on SCG model.
-Tri-State control for all outputs. 1=Hi-Z, 0=normal. Input is pulled to GND.
-3.3V Supply Voltage.
-JTAG pin that is used only by Connor-Winfield for programming. Do not connect
-Control pin B used to select input frequency. Input is pulled to GND.
-Control pin A used to select input frequency. Input is pulled to GND.
Typical Application
Figure 4
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CONNOR
WINFIELD
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Specifications subject to change without notice.
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DATE:
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