External reference frequency input. Connect to externally generated reference signal.
Digital logic input used to select Spreading Range. This pin has an internal pull-up
resistor. Refer to
Modulation Selection Table.
Digital logic input used to select Spreading Range. This pin has an internal pull-up
resistor. Refer to
Modulation Selection Table.
Ground to entire chip. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
Spread spectrum clock output.
Digital logic input used to select Spreading Range. This pin has an internal pull-up
resistor. Refer to
Modulation Selection Table.
Power supply for the entire chip.
Modulation Selection
Spreading Range (± %)
CP0
0
0
0
0
1
1
1
1
CP1
0
0
1
1
0
0
1
1
SR0
32.5MHz
0
1
0
1
0
1
0
1
1.75
1.89
1.39
2.1
0.74
1.1
0.32
0.58
54MHz
1.53
1.7
1.2
1.85
0.6
0.93
0.3
0.5
65MHz
1.41
1.55
1.1
1.7
0.57
0.86
0.28
0.45
81MHz
1.27
1.4
1.0
1.55
0.52
0.77
0.26
0.4
108MHz
1.1
1.2
0.9
1.35
0.45
0.68
0.23
0.36
(FIN /40) * 62.89
KHz
Modulation Rate
(KHz)
Rev. 2 | Page 2 of 7 | www.onsemi.com
PCS3P2042B
Spread Spectrum Selection
The
Modulation Selection Table
defines the possible spread spectrum options. The optimal setting should minimize system
EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1).
For example, PCS3P2042B is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x
768) flat panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a
percentage deviation of ±1.00% from F
IN
. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at
a modulation rate of 102.19KHz. Refer to
Modulation Selection Table.
The example in the following illustration is a common
EMI reduction method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile
graphic accelerator manufacturers.
Application Schematic for Mobile LCD Graphics Controllers
+3.3V
65MHz from graphics accelerator
1 CLKIN
2 CP0
3 CP1
4 VSS
VDD
SR0
8
7
0.1 F
ModOUT 6
SSON#
5
Modulated 65MHz signal with
±1.00% deviation and
modulation rate of 102.19KHz.
This signal is connected back
to the spread spectrum input
pin (SSIN) of the graphics
accelerator.
PCS3P2042B
Digital control for the SS enable
or disable.
Rev. 2 | Page 3 of 7 | www.onsemi.com
PCS3P2042B
Absolute Maximum Ratings
Symbol
VDD, V
IN
T
STG
T
s
T
J
T
DV
Storage temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Parameter
Rating
-0.5 to +4.6
-65 to +125
260
150
2
Unit
V
°
C
°
C
°
C
KV
Voltage on any input pin with respect to Ground
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Symbol
VDD
T
A
T
J
Operating
temperature
Junction
temperature
Thermal
Resistance
Parameter
Supply Voltage with respect to Ground
Commercial
Commercial
TSSOP
TSSOP
Min
3.0
0
Typ
3.3
Max
3.6
+70
79.80
Unit
V
°
C
°
C
°
C/W
θ
JC
124
Rev. 2 | Page 4 of 7 | www.onsemi.com
PCS3P2042B
DC Electrical Characteristics
Symbol
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
I
CC
V
DD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
(pull-up resistor on inputs CP0, CP1 and SR0)
Input high current (pull-down resistor on input SSON#)
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