Product Specification
PE613010
Product Description
The PE613010 is an SPST tuning control switch based
on Peregrine’s UltraCMOS
®
technology. This highly
versatile switch supports a wide variety of tuning circuit
topologies with emphasis on impedance matching and
aperture tuning applications. PE613010 features low on-
resistance and insertion loss from 100 to 3000 MHz.
PE613010 offers high RF power handling and
ruggedness, while meeting challenging harmonic and
linearity requirements enabled by Peregrine’s HaRP™
technology. With single-pin low voltage CMOS control,
all decoding and biasing is integrated on-chip and no
external bypassing or filtering components are required.
UltraCMOS tuning devices feature ease of use while
delivering superior RF performance. With built-in bias
voltage generation and ESD protection, tuning control
switches provide a monolithically integrated tuning
solution for demanding RF applications.
UltraCMOS
®
SPST Tuning Control
Switch, 100–3000 MHz
Features
Open reflective architecture
Very low on-resistance of 1.2Ω
Low insertion loss
0.20 dB @ 900 MHz
0.40 dB @ 1900 MHz
High power handling: 38 dBm (50Ω)
Wide power supply range (2.3V to 4.8V)
High ESD tolerance of 2 kV HBM
on all pins
Applications include:
Open and closed-loop tunable
antennas for 2G/3G/4G
Tunable matching networks
Tunable filter networks
Bypassing applications
RFID readers
Figure 1. Functional Block Diagram
Figure 2. Package Type
10-lead 2
2
0.55 mm QFN
DOC-53244
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©2013–2014 Peregrine Semiconductor Corp. All rights reserved.
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Product Specification
PE613010
Table 1. Electrical Specifications @ 25°C, V
DD
= 2.75V
Parameter
Operational Frequency
R
ON
C
OFF
RF+ to RF–, SW
ON
, DC measurement
RF+ to RF–, SW
OFF
100 to 960 MHz, (RF+ to RF–), SW
ON
960 to 1710 MHz, (RF+ to RF–), SW
ON
Insertion Loss
1
1710 to 2170 MHz, (RF+ to RF–), SW
ON
2170 to 2700 MHz, (RF+ to RF–), SW
ON
2700 to 3000 MHz, (RF+ to RF–), SW
ON
100 to 960 MHz, (RF+ to RF–), SW
OFF
960 to 1710 MHz, (RF+ to RF–), SW
OFF
Isolation
2
1710 to 2170 MHz, (RF+ to RF–), SW
OFF
2170 to 2700 MHz, (RF+ to RF–), SW
OFF
2700 to 3000 MHz, (RF+ to RF–), SW
OFF
Harmonics
3,4
Input IP3
IMD3
Switching Time
Notes:
Condition
Min
100
Typ
Max
3000
Unit
MHz
Ω
pF
1.20
0.40
0.20
0.30
0.40
0.60
0.80
10
6
4
3
3
11
7
5
4
4
–60
–50
70
–115
7
–105
12
–36
–36
0.30
0.40
0.50
0.70
0.95
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
dBm
dBm
µs
2fo, 3fo: 698 to 915 MHz, P
IN
+35 dBm (SW
ON
), P
IN
+31 dBm (SW
OFF
)
2fo, 3fo: 1710 to 1910 MHz, P
IN
+33 dBm, (SW
ON)
), P
IN
+29 dBm (SW
OFF
)
100 to 3000 MHz
Bands I,II,V,VIII, +20 dBm CW @ TX freq, –15 dBm CW @ 2TX–RX freq, 50Ω, SW
ON
50% VCTRL to 90% RF ON or 10% RF OFF
1. Assumes optimal matching with 1.5 nH inductor in series with each RF port.
2. Open reflective architecture for flexible configuration of switch in tuning application.
3. Pulsed RF input with 4620 µs period, 50% duty cycle, measured per 3GPP TS 45.005.
4. Power handling in the OFF state reduced due to highly reflective load condition.
©2013–2014 Peregrine Semiconductor Corp. All rights reserved.
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UltraCMOS
®
RFIC Solutions
PE613010
Product Specification
Figure 3. Pin Configuration (Top View)
Table 4. Operating Ranges
Parameter
V
DD
Supply Voltage
I
DD
Power Supply Current
(V
DD
= 2.75V, 25°C)
V
IH
Control Voltage High
V
IL
Control Voltage Low
Peak Operating RF Voltage
1,2
100 MHz–3 GHz
T
OP
Operating Temperature Range
–40
+25
1.2
0
Min
2.30
Typ
2.75
140
1.8
0
Max
5.50
200
3.1
0.57
25
3
+85
Unit
V
µA
V
V
Vpk
°C
Notes: 1. Between all RF ports, and from RF ports to GND.
2. Pulsed RF input duty cycle of 50% and 4620 µs, measured per 3GPP
TS 45.005.
3. RF input power of 38 dBm (50Ω, SW
ON
) and 32 dBm (50Ω, SW
OFF
).
Table 2. Pin Descriptions
Pin #
1
2
3
4
5
6
7
8
9
10
11
Pin Name
RF–
RF–
GND
V
DD
GND
GND
V1
RF+
RF+
GND
GND
Description
Negative RF Port
1
Negative RF Port
1
Ground
2
Power Supply Pin
Ground
2
Ground
2
Switch control input, CMOS logic level
Positive RF Port
1
Positive RF Port
1
Ground
2
Exposed Ground Paddle
2
Table 5. Absolute Maximum Ratings
Symbol
V
DD
V
CTRL
T
ST
V
ESD,HBM
Parameter/Conditions
Supply Voltage
Digital Input Voltage (V1)
Storage Temperature Range
HBM ESD Voltage, All Pins*
Min
–0.3
–0.3
–65
Max
5.5
3.6
+150
2000
Unit
V
V
°C
V
Note: * Human Body Model (MIL_STD 883 Method 3015.7).
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted
to the limits in the Operating Ranges table.
Operation between operating range maximum
and absolute maximum for extended periods
may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Latch-Up Avoidance
Notes: 1. Multiple RF pins are provided for flexibility. They can be tied together for
optimal RF performance, or used individually (leave unused pin floating).
2. For optimal performance, recommend tying Pins 3, 5, 6, 10, 11 together
on PCB.
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE613010 in the 10-lead 2
2
0.55 mm QFN
package is MSL1.
Table 3. Truth Table
State
Switch OFF
Switch ON
V1
0
1
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
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Product Specification
PE613010
Equivalent Circuit Model Description
The Equivalent Circuit Model includes all parasitic
elements and is accurate in switch on and switch
off states, reflecting physical circuit behavior
accurately and providing very close correlation to
measured data. It can easily be used in circuit
simulation programs.
C
S
represents switch core capacitance between
RF+ and RF– ports in the SW
OFF
state. The
parameter R
S
represents the Equivalent Series
Resistance (ESR) of the switch core.
Parasitic inductance due to circuit and package is
modeled as L
S
. C
P
represents the circuit and
package parasitics from RF ports to GND.
Figure 4. Equivalent Circuit Model Schematic
Table 6. Equivalent Circuit Model Parameters
Parameter
C
S
C
P
R
SW
R
P
L
S
Equation (SW=0 for OFF and SW=1 for ON)
0.40
0.65
if SW == 1 then 1.2 else 100e3
6
0.35
Unit
pF
pF
Ω
Ω
nH
©2013–2014 Peregrine Semiconductor Corp. All rights reserved.
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DOC-11414-5
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UltraCMOS
®
RFIC Solutions
PE613010
Product Specification
Evaluation Board
The 101-0738 Evaluation Board (EVB) was
designed for accurate measurement of the tuning
switch impedance and loss using 2 Port Series
(J4, J5) configuration. Three calibration standards
are provided. The open (J2) and short (J1)
standards (104 ps delay) are used for performing
port extensions and accounting for electrical length
and transmission line loss. The Thru (J8, J10)
standard can be used to estimate PCB
transmission line loss for scalar de-embedding.
The board consists of a 4 layer stack with
2 outer layers made of Rogers 4350B (ε
r
= 3.48)
and 2 inner layers of FR4 (ε
r
= 4.80). The total
thickness of this board is 62 mils (1.57 mm).
The inner layers provide a ground plane for the
transmission lines. Each transmission line is
designed using a coplanar waveguide with
ground plane (CPWG) model using a trace width
of 32 mils (0.813 mm), gap of 15 mils (0.381 mm),
and a metal thickness of 1.4 mils (0.051 mm).
Figure 5. Evaluation Board
PRT-08405
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