SDC-630/632/634*
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has...
®
10-, 12-, 14-BIT SYNCHRO-TO-DIGITAL
OR RESOLVER-TO-DIGITAL CONVERTER
FEATURES
•
Standard Low Profile Converters with
Optional Velocity Output
•
Signal and Reference Input:
- Internal Transformer Isolation
- All Common L-L Levels and
Frequencies
•
Accuracy:
10 Bit: 21 Minutes
12 Bit: 8.5 Minutes
14 Bit: 4 Minutes, 0.9 LSB or
2.6 Minutes (High Accuracy)
•
Logic:
- TTL Compatible
- Parallel Binary Angle Output
DESCRIPTION
The SDC-630/632/634 series are low cost, low profile Synchro-to-
Digital (S/D) and Resolver-to-Digital (R/D) tracking converters with
standard pin configurations. They use a unique control transformer
algorithm that provides inherently higher accuracy and jitter-free out-
put. Utilizing a type II servo loop, these converters have no velocity
lag up to the specified tracking rate, and output data is always fresh
and continuously available. Each unit is fully trimmed and requires no
adjustment or field calibration.
•
Power Required:
±15 VDC and +5 VDC
•
For new designs see DDC
SDC-630/632/634*A/ST Series Data
Sheet
APPLICATIONS
These converters may be used wherever analog angle data from a
synchro or resolver must be rapidly and accurately converted to digi-
tal form for transmission, storage or analysis. Because these units are
extremely rugged and stable, and meet the requirements on MIL-
STD-202E, they are suitable for the most severe industrial, commer-
cial and military applications. Military ground support and avionics
uses include ordnance control, radar tracking systems, navigation
and collision avoidance systems.
* Patented
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7771
All trademarks are the property of their respective owners.
©
1993, 1999 Data Device Corporation
Data Device Corporation
www.ddc-web.com
SIN
Θ
COS
Θ
RH
REF
RL
INPUT OPTIONS
SYNCHRO INPUT OPTION
S1
S2
S3
SCOTT-T
TRANSFORMER
REFERENCE
ISOLATION
TRANSFORMER
DEMODULATOR
SIN
(Θ −φ)
SIN
(Θ −φ)
COS
ω
t
SIN
Θ
COS
Θ
ERROR
PROCESSOR
AND
VOLTAGE
CONTROLLED
OSCILLATOR
VEL
VELOCITY
(OPTIONAL)
INH
INHIBIT
CB
CONVERTER
BUSY
2
SIN
Θ
COS
Θ
INPUT
OPTION
SOLID STATE
CONTROL
TRANSFORMER
(CT)
UP-DOWN COUNTER
(CONTAINS ANGLE
φ
)
RESOLVER INPUT OPTION
BIT 1
S1
S2
S3
S4
SOLID STATE
RESOLVER
BUFFER
BIT 10,
12 OR 14
BIT 1
(MSB)
BIT 10,12, OR 14
(LSB)
SDC-630/632/634
L-1/11-0
FIGURE 1. SDC-630/632/634 BLOCK DIAGRAM
TABLE 1. SDC-630/632/634 SPECIFICATIONS
(Apply over temperature range, power supply range, reference fre-
quency and amplitude range, ±10% signal amplitude variation, and up
to 10% harmonic distortion in the reference.)
VALUE
PARAMETER
SDC-630 SDC-632
RESOLUTION
ACCURACY
Standard Units
High Accuracy Option
SIGNAL AND REFERENCE
INPUT
10 bits
12 bits
SDC-634
14 bits
TABLE 1. SDC-630/632/634 SPECIFICATIONS (CONT.)
(Apply over temperature range, power supply range, reference fre-
quency and amplitude range, ±10% signal amplitude variation, and up
to 10% harmonic distortion in the reference.)
VALUE
PARAMETER
RESOLUTION
DYNAMIC
CHARACTERISTICS
Min
SDC-630
10 bits
Typ Min
SDC-632
12 bits
Typ Min
SDC-634
14 bits
Typ
±21 min ±8.5 min ±4 min ±0.9 LSB
—
—
±2.6 min
Signal
Frequency
Range
Signal Input
Impedance
(L-L Balanced, Resistive)
148 kΩ min
148 kΩ min
19 kΩ min
Synchro Input*
90V L-L, 400 Hz (Option H) 350-1000 Hz
90V L-L, 60 Hz (Option I)
47-1000 Hz
11.8V L-L, 400 Hz (Option L) 350-1000 Hz
Resolver Input*
90V L-L, 400 Hz (Option H) 350-1000 Hz
26V L-L, 400 Hz (Option M) 350-1000 Hz
11.8V L-L, 400 Hz (Option L) 350-1000 Hz
REFERENCE INPUT*
Reference
Voltage
Range
40-150 Vrms
10-50 Vrms
Input Rate for Full
Accuracy (Min Range)
Options H, M, L (400 Hz) 0-22 rps
Option I (60 Hz)
0-8 rps
40 0-40 rps 50 0-10 rps 15
10 0-10 rps 12.5 0-1.25 rps 3
Acceleration for 1 LSB Lag
Options H, M, L (400 Hz) 12,600°/sec
2
typ 4500°/sec
2
typ 610°/sec
2
typ
Option I (60 Hz)
770°/sec
2
typ 295°/sec
2
typ 20°/sec
2
typ
Settling Time
For Normal Tracking (Up
to Specified Input Rate) No lag error
For 179° Step Change
(Typical Values)
Options H, M, L (400 Hz)
Settling to 1 LSB
80 msec
Settling to Final Value 100 msec
Option I (60 Hz)
Settling to 1 LSB
300 msec
Settling to Final Value 500 msec
Velocity Constant (Type II
servo loop)
198 kΩ min
57 kΩ min
26 kΩ min
Reference Input
Impedance (Resistive)
300 kΩ min
80 kΩ min
No lag error
No lag error
Options H, I
Options M, L
90 msec
110 msec
300 msec
360 msec
150 msec
200 msec
800 msec
1000 msec
*Transformer Isolated. Other voltages and frequencies available on
special order.
DIGITAL INPUT/OUTPUTS
Logic Type
Inhibit Input (INH) Loading
TTL
Logic “0” inhibits
0.2 Std. TTL loads plus 18 KΩ min
pull-up resistor to +5V supply
Low power Schottky (can drive
remote loads)
KV=∞
KV=∞
KV=∞
Outputs
Type
Acceleration Constant
(Nominal Values)
Options H, M, L (400 Hz) Ka=36,000sec
2
Ka=54,000sec
2
Ka=27,800sec
2
Option I (60 Hz)
Ka=2,200sec
2
Ka=3,600sec
2
Ka=900sec
2
POWER SUPPLIES
Nominal Voltage
Voltage Range
Maximum Voltage Without
Damage
Current
SDC-630 (632) Typical
Maximum
SDC-634
Typical
Maximum
TEMPERATURE
RANGES
Operating
-1 Option
-3 Option
Storage
PHYSICAL
CHARACTERISTICS
Size (Encapsulated
Module)
Weight
+15 V Supply -15 V Supply
+5 V Supply
10, 12, or 14 Parallel Data Bits Natural Binary Angle; Positive logic
Converter Busy (CB)
0.5 to 1.5 µsec positive pulse.
Data changes on leading edge.
2 Std. TTL loads
+11 to +16.5 V -11 to -16.5 V +4.5 to +5.5 V
+18 V
8 mA
13 mA
10 mA
15 mA
-18 V
(4) 18 mA
(6) 30 mA
20 mA
30 mA
+7 V
(18) 80 mA (80)
(30) 120 mA (120)
100 mA
150 mA
Drive Capability
VELOCITY OUTPUT
(ON SPECIAL ORDER ONLY)
Type
Derived from an op-amp with low
impedance output. Positive Output for
increasing angle
10V Min
Voltage Range
Scale Factor (for SDC-634 -
Others on Request)
Options H, M, and L
Option I
-55°C to +105°C
0°C to +70°C
-55°C to +125°C
6V per rps nominal (10V = 15 rps)
3.3V per rps nominal (10V = 2.7 rps)
3.125 x 2.625 x 0.435 inches
(7.94 x 6.67 x 1.10 cm)
4 oz
(113 gm.)
Data Device Corporation
www.ddc-web.com
3
SDC-630/632/634
L-1/11-0
TECHNICAL INFORMATION
TIMING
FIGURE 2 shows the timing waveforms of the converter.
Whenever an input angle change occurs, the converter changes
the digital angle in steps of 1 LSB, and generates a converter
busy impulse (CB). The CB is a positive pulse 0.5 to 1.5µsec
long. Data changes on the leading edge of the CB pulse, and
data can be transferred 0.5µsec after the leading edge.
The simplest method of interfacing with a computer is to transfer
data at a fixed time interval after the inhibit is applied. The con-
verter will ignore an inhibit applied during the “busy” interval until
that interval is over. Timing is as follows: (a) apply the inhibit, (b)
wait 0.5µsec, (c) transfer the data, and (d) release the inhibit.
Extra CB pulses will not occur if the input angle changes while
the counter is locked by the INH.
θ
2
OVERSHOOT
θ
1
SMALL SIGNAL
SETTLING TIME
MAX SLOPE EQUALS
TRACKING RATE (SLEW RATE)
FIGURE 3. RESPONSE TO A STEP INPUT
The nominal open loop transfer function is given by
A
2
(
G=
S
B
S
10B
+1)
CONVERTER "1"
BUSY (CB) "0"
INHIBIT "1"
(INH) "0"
6.1
μs
MIN
DEPENDS ON dθ
dt
0.5-1.5
μs
S
2
(
+1)
where the parameters A and B are:
TABLE 2. TRANSFER FUNCTION PARAMETERS
.5
μs
SDC-630
A
400 Hz
B
A
60 Hz
B
190 sec-1
91 sec-1
46 sec-1
23 sec-1
SDC-632
226 sec-1
100 sec-1
58 sec-1
26 sec-1
SDC-634
167 sec-1
56 sec-1
30 sec-1
10 sec-1
DATA
VALID
VALID
FIGURE 2. SDC-630/632/634 TIMING DIAGRAM
DYNAMIC PERFORMANCE
A type II servo loop (KV =
∞
) and very high acceleration con-
stants give these converters superior dynamic performance, as
listed in the specifications. If the power supply voltages are not
the +15 VDC nominal values, the specified input rates for full
accuracy will increase or decrease in proportion to the fractional
change in voltage. The +15 V supply voltage will determine the
positive maximum velocity, and the -15 V supply voltage will
determine the negative maximum velocity.
So long as the maximum tracking rate is not exceeded, there will
be no lag in the converter output. If a step input occurs, as is like-
ly when the power is initially turned on, the response will be crit-
ically damped. FIGURE 3 shows the response to a step input.
After initial slewing at the maximum tracking rate of the convert-
er, there is one overshoot which is inherent to a Type II servo.
The overshoot settling to a final value is a function of the small
signal settling time.
POWER SUPPLIES
The main power supplies can vary over their specified ranges
with no change in the converter specifications except for a pro-
portional change in the maximum tracking rates.
When testing or evaluating the converters, it is advisable to limit
the current to each of the three power supplies. Set each limit to
50% greater than the maximum current listed for that supply in
the specifications table.
TRANSFORMER INPUT
To prevent damage to the input transformers, the maximum
steady state voltage should not exceed the specified input volt-
age by more than 30%. The maximum common mode voltage
(DC plus recurrent AC peak) should not exceed 500 V.
Data Device Corporation
www.ddc-web.com
4
SDC-630/632/634
L-1/11-0
ACCOMMODATING NON-STANDARD INPUT
VOLTAGES
The signal and reference input levels of the SDC-630 series can
be resistively scaled to accommodate non-standard voltages. A
converter should be selected that is the next lower standard volt-
age and the voltage is then scaled up with resistors in series with
the synchro and/or reference inputs.
For a synchro input (SDC), a resistor R
SIG
is added in series with
S1, S2 and S3, which is determined as follows:
R
SIG
= 1.11K (New L-L Voltage - Standard Unit Voltage)
In the case of the RESOLVER version (RDC), the equation is:
R
SIG
= 2.2K (New L-L level - Standard Unit L-L level)
The calculated resistors are connected in series with S1 and S2
respectively. Note only two resistors are required. The required
resistor matching and its effect on accuracy, is the same as for a
synchro input (See FIGURE 4).
The Reference Voltage treatment is similar, but the value select-
ed is not critical.
R
Ref
= 2.8K (New Ref - Standard Ref)
That is, 1.11K for each volt above that for which the standard unit
is designed.
Example: An SDC-634-L (11.8V) is to be used at 50V L-L.
Here, even a 10% tolerance is adequate.
R
SIG
R
SIG
= 1.11K (50-11.8) = 42.4K
The closest available high grade resistor with a low temperature
coefficient of resistance should be used, and the three resistors
should be matched to each other as closely as possible. In gen-
eral, a 0.1% difference will introduce 1.7 arc minutes of addition-
al error due to the effect on
SIN
ratio relationship.
COS
S1
NON-STANDARD
LINE-TO-LINE
LEVEL
R
SIG
S2
R
SIG
S3
R
REF
SDC-630
NON-STANDARD
REFERENCE
LEVEL
The ABSOLUTE value of the resistor is not critical.
FIGURE 4. SIGNAL AND REFERENCE SCALING
Dimensions in inches (mm).
+
0.015
2.625
-
(66.68)
14 LSB
13
12
11
10
9
8
7
6
+
0.040
-
(1.02)
VEL
+
S4
S3
+
0.002
Dia (Typ)
3.125
-
(79.38)
+
0.015
0.26
-
0.01
(6.604)
5
4
3
2
1 MSB
SDC-630
or
SDC-632
or
SDC-634
S2
S1
CB
INH
+15V
GND
-15V
+5V
RL
RH
0.435
(11.05)
(Max)
0.21
-
(5.334)
+
0.01
2.2
-
(55.88)
+
0.10
0.20
+
0.01
-
(5.08)
(Typ.)
(Tol. Noncum.)
0.25
(6.35)
(Min)
BOTTOM VIEW
Notes:
1.
2.
3.
4.
5.
6.
Case material is glass filled Diallyl Phthalate per MIL-M-14, Type SDG-F.
Pins 13 and 14 are omitted for SDC-632, and pins 11, 12, 13, and 14 are omitted for SDC-630.
Pin VEL is present only if requested on special order.
Pin S4 is present on Resolver units, and omitted on Synchro units.
+ = No PIN
Serial Number engraved on side of case.
SIDE
VIEW
FIGURE 5. SDC-630/632/634 MECHANICAL OUTLINE
Data Device Corporation
www.ddc-web.com
5
SDC-630/632/634
L-1/11-0
PCB Design
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