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HCS02D/SAMPLE

Description
HC/UH SERIES, QUAD 2-INPUT NOR GATE, CDIP14, SIDE BRAZED, DIP-14
Categorylogic    logic   
File Size146KB,8 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
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HCS02D/SAMPLE Overview

HC/UH SERIES, QUAD 2-INPUT NOR GATE, CDIP14, SIDE BRAZED, DIP-14

HCS02D/SAMPLE Parametric

Parameter NameAttribute value
MakerRenesas Electronics Corporation
Parts packaging codeDIP
package instructionDIP,
Contacts14
Reach Compliance Codeunknown
seriesHC/UH
JESD-30 codeR-CDIP-T14
Logic integrated circuit typeNOR GATE
Number of functions4
Number of entries2
Number of terminals14
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
propagation delay (tpd)20 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm
HCS02MS
August 1995
Radiation Hardened
Quad 2-Input NOR Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
Y1 1
A1 2
B1 3
Y2 4
14 VCC
13 Y4
12 B4
11 A4
10 Y3
9 B3
8 A3
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD(Si)
• SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
• Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 10
12
Rads (Si)/s
• Dose Rate Upset >10
10
RAD(Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55
o
C to +125
o
C
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii
5µA at VOL, VOH
A2 5
B2 6
GND 7
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
Y1
A1
B1
Y2
A2
B2
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
Y4
B4
A4
Y3
B3
A3
Description
The Intersil HCS02MS is a Radiation Hardened Quad 2-Input NOR
Gate. A low on both inputs forces the output to a High state.
The HCS02MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS02MS is supplied in a 14 lead Ceramic Flatpack Package
(K suffix) or a 14 lead SBDIP Package (D suffix).
TRUTH TABLE
INPUTS
OUTPUTS
Bn
L
H
L
H
Yn
H
L
L
L
Ordering Information
PART
NUMBER
HCS02DMSR
TEMPERATURE
RANGE
-55
o
C to +125
o
C
SCREENING
LEVEL
Intersil Class
S Equivalent
Intersil Class
S Equivalent
Sample
PACKAGE
14 Lead SBDIP
An
L
L
H
H
14 Lead Ceramic
Flatpack
14 Lead SBDIP
An
(2, 5, 8, 11)
HCS02KMSR
-55
o
C to +125
o
C
NOTE: L = Logic Level Low, H = Logic level High
HCS02D/
Sample
HCS02K/
Sample
HCS02HMSR
+25
o
C
Functional Diagram
+25
o
C
Sample
14 Lead Ceramic
Flatpack
Die
Bn
Yn
(1, 4, 10, 13)
+25
o
C
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Spec Number
File Number
1
518744
2433.2
DB NA
(3, 6, 9, 12)

HCS02D/SAMPLE Related Products

HCS02D/SAMPLE HCS02K/SAMPLE
Description HC/UH SERIES, QUAD 2-INPUT NOR GATE, CDIP14, SIDE BRAZED, DIP-14 HC/UH SERIES, QUAD 2-INPUT NOR GATE, CDFP14
Maker Renesas Electronics Corporation Renesas Electronics Corporation
Parts packaging code DIP DFP
package instruction DIP, DFP,
Contacts 14 14
Reach Compliance Code unknown unknown
series HC/UH HC/UH
JESD-30 code R-CDIP-T14 R-CDFP-F14
Logic integrated circuit type NOR GATE NOR GATE
Number of functions 4 4
Number of entries 2 2
Number of terminals 14 14
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP DFP
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE FLATPACK
propagation delay (tpd) 20 ns 20 ns
Certification status Not Qualified Not Qualified
Maximum seat height 5.08 mm 2.92 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount NO YES
technology CMOS CMOS
Terminal form THROUGH-HOLE FLAT
Terminal pitch 2.54 mm 1.27 mm
Terminal location DUAL DUAL
width 7.62 mm 6.285 mm

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