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P1120-HCS-FREQ1-30

Description
CMOS Output Clock Oscillator, 0.65MHz Min, 10MHz Max
CategoryPassive components    oscillator   
File Size51KB,1 Pages
ManufacturerPletronics
Environmental Compliance
Download Datasheet Parametric View All

P1120-HCS-FREQ1-30 Overview

CMOS Output Clock Oscillator, 0.65MHz Min, 10MHz Max

P1120-HCS-FREQ1-30 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPletronics
Reach Compliance Codeunknown
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee3
Manufacturer's serial numberP1120-HC
Installation featuresTHROUGH HOLE MOUNT
Maximum operating frequency10 MHz
Minimum operating frequency0.65 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeCMOS
Output load30 pF
physical size20.5mm x 12.7mm x 5.08mm
Nominal supply voltage5 V
surface mountNO
maximum symmetry45/55 %
Terminal surfaceTin (Sn)
Pl tronics, Inc.
.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
P1145-3S, P1145-HC CMOS Series
P1145-3S: CMOS with Enable/ Disable, P1145-HC without E/D
Lower Ringing Noise Option Available to Reduce EMI
Full Size (14 Pin DIP) Metal Clock Oscillator
Available in Thru-Hole or Surface Mount Configuration
Standard Specifications
Overall Frequency Stability
Operating Temperature Range
Supply Voltage (Vcc)
Symmetry (Duty Cycle)
Logic Levels
Output Load
Ringing Noise
-3S: Enable/Disable Option (E/D)
± 50 PPM, ± 25 PPM, ± 20 PPM over Operating Temperature Range
0 to +70°C is standard, but can be extended to - 40 to +85
°C
for certain frequencies
5.0 volts and 3.3 volts available
40/60 to 60/40% is standard, but 45/55% at 50% of Vcc is also available (see Waveform 1)
Logic “1”
90% of Vcc MIN;
Logic “0”
10% of Vcc MAX
Standard load is 15pF (typ. 1 ASIC) maximum, see Test Circuit 3 or 1 (consult factory for
heavier
loads)
Depends on frequency and output load. See EMI application note
Output enabled when Pin #1 is open or at Logic “1”; Output disabled when Pin #1 is at Logic “0”.
Max. Supply Current
Icc (mA) w/ 15pF load
3.3V
5.0V
Rise and Fall Time
Tr & Tf (nS) w/ 15pF load
Typical
Maximum
650 kHz
69.999 MHz
Frequency Range
(MHz)
0.650 –
10.001 –
26.000 –
35.000 –
50.001 –
10.000
25.999
34.999
50.000
69.999
7
10
10
20
15
25
20
30
25
35
Part Numbering Guide
3.0
2.5
2.5
2.5
2.5
4.0
3.5
3.5
3.5
3.5
Packaging
Tube or on Pads,
SMD: Bulk
Portions of the part number that appear after the frequency may not be marked on part (C of C provided)
P11 45 - 3S V - 60.0M - 30 - SMD - XXX
(Internal Code or blank)
Series
Frequency Stability
45 = ± 50 PPM
44 = ± 25 PPM
20 = ± 20 PPM
Model
-3S with E/D
-HC no E/D
Surface Mount Option
Non-Std Output Load:
Blank = 15 pF max, 30 = 30 pF max
Frequency in MHz
Special Specifications (choose all that apply)
Blank: Std Specs (5.0V
± 10%,
0 to +70
°
C, 40/60% Sym)
E: Extended Operating Temperature Range (- 40 to +85
°
C)
N: Lower Ringing Noise
S: 45/55% Symmetry at 50% of Vcc
V: Supply Voltage of 3.3 volts
± 10%
not to scale
Surface Mount
0.820 (20.84) MAX
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load
Mechanical: inches (mm)
Due to part size and factory abilities, part marking may vary from lot to lot and may contain our part number or an internal code.
0 .200 (5.08)
MAX
0.500 (12.7) MAX
0.807 (20.5) MAX
PLETRONICS
0.020
(.51)
0.031 (0.8)
0.300 (7.62)
0.600 (15.24)
OUT
8
14
Vcc
0 .247 (6.28)
MAX
0.560 (14.23) MAX
0.300 (7.62)
0.767 (19.49)
0.600 (15.24)
8 8
8
7
7
7
1
14
14
14
1
1
7
GND
1
-3S Pin 1 = E/D
-HC Pin 1 = N.C.
0.250 (6.35) MAX
0.200 (5.08) TYP
Solder pad layout may use any combination of pins 1, 7, 8 & 14 shown.
Recommended pad size is .12 (3.1) x .07 (1.8) typical.
Jun 2004
Pl tronics, Inc.
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
16
CMOS < 80 MHz
Page 11A - 16
Written 32 years ago, still worth a deep dive - Avoiding the pitfalls of passive components (reprinted)
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