PM7324 S/UNI-ATLAS
S/UNI-ATLAS
DATASHEET
PMC-1971154
ISSUE 7
S/UNI-ATM LAYER SOLUTION
PM7324
S/UNI-ATLAS
SATURN USER NETWORK INTERFACE
ATM LAYER SOLUTION
DATASHEET
ISSUE 7: JANUARY, 2000
PMC-Sierra, Inc.
105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
PM7324 S/UNI-ATLAS
S/UNI-ATLAS
DATASHEET
PMC-1971154
ISSUE 7
S/UNI-ATM LAYER SOLUTION
PUBLIC REVISION HISTORY
Issue
No.
1
2
3
Issue Date
Details of Change
Sep., 1997
Nov., 1997
Initial release
Revised F4toF5 AIS processing and numerous other
clarifications and expanded descriptions.
Updated the Ingress and Egress VC Tables to include room
for Segment Defect Location and Defect Type fields. Also
included GFR policing. Modified PM internal RAM to 80-
bits wide to include support for I.356 measurement
requirements.
Updated VC Table and Register Addresses. Included
432SBGA package drawing. Enhanced description of OAM
processing, GFR policing, per-PHY policing, etc.
Removed “Proprietary and Confidential”. No content
change.
Aligns with Revision C
Corrected Reliability Calculations.
Corrected Block Diagram to reflect correct ingress/egress
backward cell interface block positions.
Modified RPOLL, IPOLL and TPOLL pin descriptions.
Table 37 – Added V
OH
specification.
Table 38 – Changed the timing specification to become
“Typical” for tSALR, tHALR, tSLR, tHLR.
Table 40 – Changed IAVALID setup and hold times (t
setup
and
t
hold
) to become “Typical”.
Table 40-45 – Changed Min CLK Frequency for RFCLK,
TFCLK, IFCLK, OFCLK, ISYSCLK, ESYSCLK.
Table 40-43 – Changed Utopia input hold times for
IWRENB[4:1], IAVALID, IADDR[4:0], IDAT[15:0], IPRTY,
ISOC, ORDENB, RPRTY, RDAT[15:0], RCA[4:1], RSOC
and TCA[4:1].
Table 40, 44, 45 – Changed prop delay times for ICA[4:1],
ISD[63:0], ISP[7:0], ESD[31:0] and ESP[3:0].
Feb., 1998
4
Oct., 1998
5
6
7
Jan., 1999
Sep., 1999
Jan., 2000
PMC-Sierra, Inc.
105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
PM7324 S/UNI-ATLAS
S/UNI-ATLAS
DATASHEET
PMC-1971154
ISSUE 7
S/UNI-ATM LAYER SOLUTION
CONTENTS
1
FEATURES..................................................................................................................................... 1
1.1
1.2
2
3
4
5
6
7
8
POLICING ........................................................................................................................ 5
CELL COUNTING............................................................................................................. 5
APPLICATIONS.............................................................................................................................. 6
REFERENCES ............................................................................................................................... 7
APPLICATION EXAMPLES ............................................................................................................ 8
DESCRIPTION ............................................................................................................................... 9
PIN DIAGRAM .............................................................................................................................. 10
PIN DESCRIPTION ...................................................................................................................... 11
FUNCTIONAL DESCRIPTION...................................................................................................... 42
8.1
8.2
INGRESS VC TABLE ..................................................................................................... 45
CONNECTION IDENTIFICATION .................................................................................. 47
8.2.1
8.3
INGRESS CONNECTION IDENTIFICATION................................................... 47
SEARCH TABLE DATA STRUCTURE........................................................................... 52
8.3.1
8.3.2
PRIMARY SEARCH TABLE............................................................................. 52
SECONDARY SEARCH KEY TABLE .............................................................. 53
8.4
8.5
INGRESS CELL PROCESSING..................................................................................... 54
EGRESS VC TABLE ...................................................................................................... 63
8.5.1
EGRESS CONNECTION IDENTIFICATION .................................................... 64
8.6
8.7
EGRESS CELL PROCESSING ...................................................................................... 67
PERFORMANCE MONITORING.................................................................................... 76
8.7.1
PERFORMANCE MONITORING FLOWS........................................................ 86
8.8
8.9
8.10
8.11
CHANGE OF CONNECTION STATE............................................................................. 88
HEADER TRANSLATION............................................................................................... 90
CELL ROUTING ............................................................................................................. 91
CELL RATE POLICING .................................................................................................. 91
8.11.1
8.11.2
8.11.3
8.11.4
PER-PHY POLICING ....................................................................................... 99
GUARANTEED FRAME RATE ...................................................................... 104
CONTINUOUSLY VIOLATING MODE ........................................................... 107
ATLAS POLICING CONFIGURATION ........................................................... 107
8.12
8.13
8.14
8.15
8.16
8.17
CELL COUNTING......................................................................................................... 108
OPERATIONS, ADMINISTRATION AND MAINTENANCE (OAM) CELL SERVICING 111
FAULT MANAGEMENT CELLS ................................................................................... 113
LOOPBACK CELLS...................................................................................................... 115
ACTIVATION/DEACTIVATION CELLS ........................................................................ 115
SYSTEM MANAGEMENT CELLS ................................................................................ 115
PROPRIETARY AND CONFIDENTIAL
i
PM7324 S/UNI-ATLAS
S/UNI-ATLAS
DATASHEET
PMC-1971154
ISSUE 7
S/UNI-ATM LAYER SOLUTION
8.18
8.19
8.20
8.21
8.22
8.23
8.24
8.25
8.26
8.27
8.28
8.29
9
F4 TO F5 OAM PROCESSING .................................................................................... 115
F5 TO F4 OAM PROCESSING .................................................................................... 124
RESOURCE MANAGEMENT CELLS .......................................................................... 129
S/UNI-ATLAS BACKGROUND PROCESSES.............................................................. 129
INGRESS BACKWARD OAM CELL INTERFACE........................................................ 131
EGRESS BACKWARD OAM CELL INTERFACE......................................................... 131
JTAG TEST ACCESS PORT........................................................................................ 132
MICROPROCESSOR INTERFACE.............................................................................. 132
EXTERNAL SRAM ACCESS........................................................................................ 132
WRITING CELLS.......................................................................................................... 133
READING CELLS ......................................................................................................... 134
ATLAS DLL CLOCK OPERATION ............................................................................... 138
NORMAL MODE REGISTER MEMORY MAP ............................................................................ 139
9.1
NORMAL MODE REGISTER DESCRIPTION .............................................................. 147
10
TEST FEATURES DESCRIPTION ............................................................................................. 407
10.1
10.2
TEST MODE 0 DETAILS.............................................................................................. 410
JTAG TEST PORT ....................................................................................................... 410
11
OPERATION............................................................................................................................... 415
11.1
11.2
SCI-PHY EXTENDED CELL FORMAT......................................................................... 415
SYNCHRONOUS STATIC RAMS ................................................................................ 417
11.2.1
11.2.2
11.3
INGRESS VC-TABLE SRAM ......................................................................... 417
EGRESS VC-TABLE SRAM........................................................................... 418
ATM CELL PROCESSING ........................................................................................... 419
11.3.1
OAM CELL FORMAT ..................................................................................... 419
11.4
INGRESS VC IDENTIFICATION SEARCH ALGORITHM ............................................ 421
11.4.1
11.4.2
OVERVIEW .................................................................................................... 422
INGRESS PERFORMANCE MONITORING ACTIVATION / DEACTIVATION428
11.5
EGRESS VC TABLE OPERATION .............................................................................. 428
11.5.1
11.5.2
11.5.3
INITIALIZATION PROCEDURE ..................................................................... 428
CONNECTION SETUP .................................................................................. 429
EGRESS PERFORMANCE MONITORING ACTIVATION / DEACTIVATION 430
11.6
JTAG SUPPORT .......................................................................................................... 431
11.6.1
TAP CONTROLLER....................................................................................... 432
12
FUNCTIONAL TIMING ............................................................................................................... 436
12.1
12.2
12.3
12.4
INGRESS INPUT CELL INTERFACE........................................................................... 436
INGRESS OUTPUT CELL INTERFACE....................................................................... 439
EGRESS INPUT CELL INTERFACE............................................................................ 441
EGRESS OUTPUT CELL INTERFACE........................................................................ 444
PROPRIETARY AND CONFIDENTIAL
ii
PM7324 S/UNI-ATLAS
S/UNI-ATLAS
DATASHEET
PMC-1971154
ISSUE 7
S/UNI-ATM LAYER SOLUTION
13
14
15
16
ABSOLUTE MAXIMUM RATINGS.............................................................................................. 447
D.C. CHARACTERISTICS .......................................................................................................... 448
A.C. TIMING CHARACTERISTICS............................................................................................. 450
MECHANICAL INFORMATION .................................................................................................. 464
PROPRIETARY AND CONFIDENTIAL
iii
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